Charge-based in-memory computing using fabricated FeFET: device-system interaction
摘要
Utilizing the Ferroelectric FET (FeFET) technology as a capacitive element in charge-based in-memory computing (IMC) arrays offers multiple advantages over the classical current-based computing, such as reduced read disturbances and negligible static power. However, traditional variation sources and reliability concerns tied to FeFET devices that challenge their applicability remain a question for non-volatile capacitor (nvCap) mode FeFET arrays. Crucially, we present a comprehensive device-to-system level comparison, demonstrating the reliability and accuracy of FeFET charge-based computing over the conventional current-based approach in the presence of variability. Device-level reliability analyses conducted experimentally using measurements from FeFET devices fabricated in a 28 nm technology platform, and additionally through TCAD simulations, reveal superior resilience against variability for the nvCap with a 0.66% σ/μ ratio for the on-state capacitance. At the circuit level, a novel 8-bit ADC array with ~90.0% accuracy was realized thanks to the reduced variability by operating the FeFET in nvCap mode. Injecting the error into our charge-based HDC model for language classification results in an average inference accuracy loss of <0.2 percentage points, while the current-based version loses as much as 5.7 percentage points.