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<p>Ultra-low voltage operation in Zigbee receivers is essential for battery-dependent IoT applications, but typical MOSFET-type LNA circuits exhibit degraded performance below 0.5 V. Most of the research on TFET LNA circuitry and evolutionary optimization focuses only on circuit performance improvement without providing much information about systematic exploration of the design space for the specific application design criteria. This work proposes a multi-objective QPSO-based optimization technique framework for common-source TFET LNA at 2.4 GHz. A 60 nm hetero-gate dielectric TFET LNA is optimized in a six-dimensional design space to provide an evaluation of both the Pareto front and parameter sensitivity analysis. In this work, the novelity lies in combining design space exploration with QPSO-based optimizations will help designers to find the best operating points based on design constraints of the application (i.e., gain, noise figure, and power). The optimized design achieved 20 dB of gain, 2.82 dB of noise figure, and 0.24 mW of total power at 0.4 V supply, yielding a figure of merit of 83.33 dB/mW. This gives the proposed method a competitive gain/power trade-off relative to previous ultra-low voltage designs along with performing well in terms of noise performance. Overall, the results underscore improved convergence and a scalable design methodology. Future work can adapt this framework to other types of analog/RF circuits, such as mixers, voltage-controlled oscillators (VCOs), and power amplifiers, as well as to mmWave frequencies and hybrid ML-assisted optimization for use in next-generation IoT systems.</p>

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Multi-objective optimization of tunnel field effect transistor based low noise amplifiers for energy efficient Zigbee receivers using QPSO

  • 期刊论文

  • 出版模式：

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  • 发表日期：

    2026年7月29日

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  • Saggurthi Spandana,
  • Sk. Hasane Ahammad,
  • Yue Zhao

摘要

Ultra-low voltage operation in Zigbee receivers is essential for battery-dependent IoT applications, but typical MOSFET-type LNA circuits exhibit degraded performance below 0.5 V. Most of the research on TFET LNA circuitry and evolutionary optimization focuses only on circuit performance improvement without providing much information about systematic exploration of the design space for the specific application design criteria. This work proposes a multi-objective QPSO-based optimization technique framework for common-source TFET LNA at 2.4 GHz. A 60 nm hetero-gate dielectric TFET LNA is optimized in a six-dimensional design space to provide an evaluation of both the Pareto front and parameter sensitivity analysis. In this work, the novelity lies in combining design space exploration with QPSO-based optimizations will help designers to find the best operating points based on design constraints of the application (i.e., gain, noise figure, and power). The optimized design achieved 20 dB of gain, 2.82 dB of noise figure, and 0.24 mW of total power at 0.4 V supply, yielding a figure of merit of 83.33 dB/mW. This gives the proposed method a competitive gain/power trade-off relative to previous ultra-low voltage designs along with performing well in terms of noise performance. Overall, the results underscore improved convergence and a scalable design methodology. Future work can adapt this framework to other types of analog/RF circuits, such as mixers, voltage-controlled oscillators (VCOs), and power amplifiers, as well as to mmWave frequencies and hybrid ML-assisted optimization for use in next-generation IoT systems.