Scholarlink

<p>This paper presents a low-power 40 Gbps optical receiver implemented using 32&#xa0;nm carbon nanotube field-effect transistor (CNTFET) technology. The proposed receiver architecture consists of a modified inverter-based transimpedance amplifier (TIA) followed by cascaded limiting amplifiers (LAs). Using the g<sub>m</sub>/I<sub>D</sub> design methodology, the TIA is optimized to achieve a balanced trade-off among gain, bandwidth, noise, and power consumption. Simulation results indicate that the proposed TIA achieves a transimpedance gain of 47.6 dBΩ, a − 3 dB bandwidth of 28.4&#xa0;GHz, and an input-referred noise current of 15.5 pA/√Hz, while consuming only 183 µW and occupying an area of 3.93&#xa0;μm². The complete receiver provides an overall gain of 77.8 dBΩ, a − 3 dB bandwidth of 29.5&#xa0;GHz, and a total power consumption of 1377 µW within a layout area of 49.19&#xa0;μm². In addition, analytical predictions derived from the g<sub>m</sub>/I<sub>D</sub> framework are in close agreement with the simulation results, thereby validating the adopted design methodology. Compared with conventional CMOS-based implementations, the proposed CNTFET-based receiver demonstrates notable improvements in power efficiency, noise performance, and integration density, indicating its potential for next-generation optical interconnects and communication systems.</p>

错误：搜索内容不能为空，请输入英文关键词
错误：关键词超出字数限制，请精简
高级检索

A 40 Gbps low-power inverter-based CNTFET optical receiver

  • 期刊论文

  • 出版模式：

    开放获取

  • 发表日期：

    2026年6月18日

查看全文
  • Nazanin Zamani,
  • Mehdi Amoon,
  • Zahra Alaie,
  • Mahmoud Daneshvar Farzanegan

摘要

This paper presents a low-power 40 Gbps optical receiver implemented using 32 nm carbon nanotube field-effect transistor (CNTFET) technology. The proposed receiver architecture consists of a modified inverter-based transimpedance amplifier (TIA) followed by cascaded limiting amplifiers (LAs). Using the gm/ID design methodology, the TIA is optimized to achieve a balanced trade-off among gain, bandwidth, noise, and power consumption. Simulation results indicate that the proposed TIA achieves a transimpedance gain of 47.6 dBΩ, a − 3 dB bandwidth of 28.4 GHz, and an input-referred noise current of 15.5 pA/√Hz, while consuming only 183 µW and occupying an area of 3.93 μm². The complete receiver provides an overall gain of 77.8 dBΩ, a − 3 dB bandwidth of 29.5 GHz, and a total power consumption of 1377 µW within a layout area of 49.19 μm². In addition, analytical predictions derived from the gm/ID framework are in close agreement with the simulation results, thereby validating the adopted design methodology. Compared with conventional CMOS-based implementations, the proposed CNTFET-based receiver demonstrates notable improvements in power efficiency, noise performance, and integration density, indicating its potential for next-generation optical interconnects and communication systems.