Engineered exchange interactions, realized through the iSWAP and \(\sqrt{i\text {SWAP}}\) gates, play a fundamental role in entangling operations for quantum algorithms, simulation of spin-exchange dynamics, and optimized qubit connectivity. In this work, we present hardware-aware implementations of the iSWAP and \(\sqrt{i\text {SWAP}}\) gates tailored to superconducting quantum processors, along with comprehensive characterization using both quantum process tomography (QPT) and direct state measurements (DSM). QPT results show process fidelities of 97.32% (iSWAP) and 98.02% ( \(\sqrt{i\text {SWAP}}\) ) on quantum simulator, decreasing to 89.72% and 87.65% on quantum hardware, respectively. DSM on the \(|00\rangle\) input state reveals that the iSWAP implementation achieves higher state preservation fidelity on hardware (93.53% vs. 92.44% for \(\sqrt{i\text {SWAP}}\) ) but shows higher measured \(|11\rangle\) population (2.26% vs. 0.38%). These results establish a benchmark for anisotropic exchange gates on noisy intermediate-scale quantum (NISQ) hardware and provide quantitative performance data to inform gate selection for quantum circuit design in the NISQ era.
