High performance IP lookup through GPU acceleration to support scalable and efficient routing in data driven communication networks
摘要
When more people use the network, the overall network traffic grows steadily. To achieve better performance, devices connecting different end systems must process incoming packets at wire speed. One critical aspect of packet processing is IP lookup. So, an effective mechanism for parallelizing IP lookup on General-Purpose Graphics Processing Unit (GPGPU) is introduced in this work. Considering that, the complexity of the lookup operation increases with IP address length, the proposed approach reduces the length of each IP address by employing suitable compression techniques. Consequently, IP address lookup is conducted in parallel using longest prefix match (LPM) by splitting compressed IP address into two parts. In this proposed work, the lookup complexity can be reduced to