<p>Hybrid HVDC circuit breakers (H-DCCB) are an ideal choice for fault current interruption in voltage source converter (VSC) based multi-terminal HVDC (MT-HVDC) grids. However, in case of a DC side short circuit fault in VSC based MT-HVDC girds, the fault current escalates rapidly. This imposes significant electrical and thermal stresses on H-DCCB components, leading to decrease in its operational life span and even component damage. To address this challenge, this paper proposes the integration of a novel thyristor responsive adaptive fault current limiter (TRA-FCL) topology designed specifically to mitigate these stresses. The proposed TRA-FCL, comprising resistive, capacitive, and thyristor-based components, operates by inserting fault current limiting resistors during fault conditions. This action effectively reduces the fault current magnitude, thereby reducing the electrical and thermal burden on the H-DCCB and enhancing the overall reliability of the MT-HVDC grid. Simulation results, obtained using PSCAD/EMTDC software, confirm that the TRA-FCL can prevent VSC blocking, ensuring continuous grid operation and reducing the operational stress on H-DCCB.</p>

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Enhancing electrical and thermal stress capabilities of hybrid CBs in VSC based MT HVDC grids using thyristor based FCL topology

  • Baseem Khan,
  • Muhammad Zain Yousaf,
  • Saqib Khalid,
  • Muhammad Armughan Shakeel,
  • Josep M. Guerrero,
  • Rajkumar Sivanraju

摘要

Hybrid HVDC circuit breakers (H-DCCB) are an ideal choice for fault current interruption in voltage source converter (VSC) based multi-terminal HVDC (MT-HVDC) grids. However, in case of a DC side short circuit fault in VSC based MT-HVDC girds, the fault current escalates rapidly. This imposes significant electrical and thermal stresses on H-DCCB components, leading to decrease in its operational life span and even component damage. To address this challenge, this paper proposes the integration of a novel thyristor responsive adaptive fault current limiter (TRA-FCL) topology designed specifically to mitigate these stresses. The proposed TRA-FCL, comprising resistive, capacitive, and thyristor-based components, operates by inserting fault current limiting resistors during fault conditions. This action effectively reduces the fault current magnitude, thereby reducing the electrical and thermal burden on the H-DCCB and enhancing the overall reliability of the MT-HVDC grid. Simulation results, obtained using PSCAD/EMTDC software, confirm that the TRA-FCL can prevent VSC blocking, ensuring continuous grid operation and reducing the operational stress on H-DCCB.