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<p>This work introduces the design and analysis of a Bandgap Reference (BGR) circuit with better temperature stability and reduced process variation. The second-order compensation method is implemented for design through an optimized error amplifier and a resistor network with a significantly better temperature coefficient performance. The startup mechanism is carefully designed for ensured strong and stable circuit performance under every variation of process-voltage-temperature (PVT). The proposed BGR is compared with conventional methods such as CM-BGR, Cascaded CM-BGR, Operational Amplifier based-BGR, and Sub-BGR with respect to Temperature Coefficient (TC), Power Supply Rejection Ratio (PSRR), and line regulation. The proposed Sub-BGR is shown to provide 3.33&#xa0;ppm/°C (58.97–78.79% less) temperature coefficient, 1.12×–6.02× improvement in PSRR, and 96% improved line regulation with 723&#xa0;µV variation, thus showing improved performance compared to Operational Amplifier based-BGR and Sub-BGR techniques, rendering the proposed BGR highly appropriate for high-precision analog and mixed-signal applications. The proposed BGR is simulated and implemented by Synopsys custom compile using 32&#xa0;nm CMOS technology.</p>

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0.91 V reference, 3.3 ppm/°C Sub-BGR with second-order compensation and improved PSRR

  • 期刊论文

  • 出版模式：

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  • 发表日期：

    2025年8月23日

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  • Chokkakula Ganesh,
  • Satheesh Kumar S,
  • A. Shanthi,
  • Sk Shoukath Vali

摘要

This work introduces the design and analysis of a Bandgap Reference (BGR) circuit with better temperature stability and reduced process variation. The second-order compensation method is implemented for design through an optimized error amplifier and a resistor network with a significantly better temperature coefficient performance. The startup mechanism is carefully designed for ensured strong and stable circuit performance under every variation of process-voltage-temperature (PVT). The proposed BGR is compared with conventional methods such as CM-BGR, Cascaded CM-BGR, Operational Amplifier based-BGR, and Sub-BGR with respect to Temperature Coefficient (TC), Power Supply Rejection Ratio (PSRR), and line regulation. The proposed Sub-BGR is shown to provide 3.33 ppm/°C (58.97–78.79% less) temperature coefficient, 1.12×–6.02× improvement in PSRR, and 96% improved line regulation with 723 µV variation, thus showing improved performance compared to Operational Amplifier based-BGR and Sub-BGR techniques, rendering the proposed BGR highly appropriate for high-precision analog and mixed-signal applications. The proposed BGR is simulated and implemented by Synopsys custom compile using 32 nm CMOS technology.