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<p>This paper introduces a new 60<InlineEquation ID="IEq4"> <InlineMediaObject> <ImageObject Color="BlackWhite" FileRef="41598_2025_9513_Article_IEq1.gif" Format="GIF" Height="7" Rendition="HTML" Resolution="72" Type="Linedraw" Width="9" /> </InlineMediaObject> <EquationSource Format="TEX">\(^{\circ }\)</EquationSource> </InlineEquation> Flat PWM Technique for Single-Source Switched-Capacitor(SC) Multilevel Inverter with Quadruple Boost (60FP-MLI-QB) and Enhanced Output. The proposed design generates nine output levels with lower switching losses using the 60<InlineEquation ID="IEq5"> <InlineMediaObject> <ImageObject Color="BlackWhite" FileRef="41598_2025_9513_Article_IEq1.gif" Format="GIF" Height="7" Rendition="HTML" Resolution="72" Type="Linedraw" Width="9" /> </InlineMediaObject> <EquationSource Format="TEX">\(^{\circ }\)</EquationSource> </InlineEquation> Flat PWM (60FP) Technique. Furthermore, this technique increases the voltage gain enhancement while flattening the sine wave at its peak. The driven inverter topology includes 11 switches, two capacitors, and a diode, with each levels circuit connected through six or five switches. The performance of the proposed 60FP-MLI-QB is tested through simulation and hardware experiments under various dynamic conditions, showing its flexibility and superiority compared to similar configurations. Moreover, the paper presents a harmonic minimization technique through various FP methods by modifying the sinusoidal modulation reference.</p>

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60\(^{\circ }\) Flat PWM technique for single-source switched-capacitor multilevel inverter with quadruple voltage boost and enhanced output

  • 期刊论文

  • 出版模式：

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  • 发表日期：

    2025年7月2日

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  • Oorappan G. M,
  • Lakshmanan S. A,
  • Jagabar Sathik M

摘要

This paper introduces a new 60 \(^{\circ }\) Flat PWM Technique for Single-Source Switched-Capacitor(SC) Multilevel Inverter with Quadruple Boost (60FP-MLI-QB) and Enhanced Output. The proposed design generates nine output levels with lower switching losses using the 60 \(^{\circ }\) Flat PWM (60FP) Technique. Furthermore, this technique increases the voltage gain enhancement while flattening the sine wave at its peak. The driven inverter topology includes 11 switches, two capacitors, and a diode, with each levels circuit connected through six or five switches. The performance of the proposed 60FP-MLI-QB is tested through simulation and hardware experiments under various dynamic conditions, showing its flexibility and superiority compared to similar configurations. Moreover, the paper presents a harmonic minimization technique through various FP methods by modifying the sinusoidal modulation reference.