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<p>An innovative GaN trench MOSFET featuring an ultra-low gate-drain charge (<i>Q</i><sub><i>gd</i></sub>) is proposed, with its operational mechanisms thoroughly investigated using TCAD simulations. This novel MOSFET design introduces a triple-shield structure (BPSG-MOS) comprising three critical components: (1) a grounded split gate (SG), (2) a P+ shield region (PSR), and (3) a semi-wrapped BP layer that extends the P-shield beneath the gate and along the sidewalls of the trench gate. Both the SG and PSR effectively reduce gate-drain coupling, transforming most of the gate-drain capacitance (<i>C</i><sub><i>gd</i></sub>) into a series combination of gate-source capacitance (<i>C</i><sub><i>gs</i></sub>) and drain-source capacitance (<i>C</i><sub><i>ds</i></sub>). Furthermore, the BP layer refines the gate-drain capacitance by converting the <i>C</i><sub><i>gd</i></sub> at the trench gate sidewalls into <i>C</i><sub><i>gs</i></sub>. This configuration significantly lowers <i>C</i><sub><i>gd</i></sub>, resulting in an ultra-low <i>Q</i><sub><i>gd</i></sub>. Compared to the dual-shield MOSFET (PSGT-MOS) and the conventional trench MOSFET (TG-MOS), the BPSG-MOS achieves reductions in <i>C</i><sub><i>gd</i></sub> by 81% and 98%, respectively.</p>

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A low switching loss GaN trench MOSFET design utilizing a triple-shield structure

  • 期刊论文

  • 出版模式：

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  • 发表日期：

    2025年1月2日

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  • Yihang Qiu,
  • Li Wei

摘要

An innovative GaN trench MOSFET featuring an ultra-low gate-drain charge (Qgd) is proposed, with its operational mechanisms thoroughly investigated using TCAD simulations. This novel MOSFET design introduces a triple-shield structure (BPSG-MOS) comprising three critical components: (1) a grounded split gate (SG), (2) a P+ shield region (PSR), and (3) a semi-wrapped BP layer that extends the P-shield beneath the gate and along the sidewalls of the trench gate. Both the SG and PSR effectively reduce gate-drain coupling, transforming most of the gate-drain capacitance (Cgd) into a series combination of gate-source capacitance (Cgs) and drain-source capacitance (Cds). Furthermore, the BP layer refines the gate-drain capacitance by converting the Cgd at the trench gate sidewalls into Cgs. This configuration significantly lowers Cgd, resulting in an ultra-low Qgd. Compared to the dual-shield MOSFET (PSGT-MOS) and the conventional trench MOSFET (TG-MOS), the BPSG-MOS achieves reductions in Cgd by 81% and 98%, respectively.