<p>Recent advances in coherent spin shuttling have made sparse semiconductor spin-qubit arrays an appealing solid-state platform to realize quantum processors<sup><CitationRef AdditionalCitationIDS="CR2 CR3 CR4 CR5 CR6" CitationID="CR1">1</CitationRef>–<CitationRef CitationID="CR7">7</CitationRef></sup>. The dynamic and long-range connectivity enabled by shuttling is also essential for many quantum error-correction schemes<sup><CitationRef AdditionalCitationIDS="CR9" CitationID="CR8">8</CitationRef>–<CitationRef CitationID="CR10">10</CitationRef></sup>. Here we demonstrate a silicon spin-qubit device comprising a shuttling bus for coherently transporting qubits that can interact at four isolated locations that we call bus stops. We dynamically populate the array and tune all single- and two-qubit operations using shuttling and quantum non-demolition spin measurements, without access to charge sensing in most of the device. We achieve universal control of the effective five-qubit processor and select the connectivity required to form a surface-code stabilizer plaquette that supports <i>X</i>- and <i>Z</i>-type parity checks up to weight four. We use the parity checks to generate multi-qubit entanglement between all qubit combinations in the array and report the genuine entanglement of a five-qubit Greenberger–Horne–Zeilinger state, constituting one of the largest such states constructed with gate-defined semiconductor spins. The protocols developed here lay the groundwork for modular calibration and operation of sparse spin-qubit arrays, and we highlight the feasibility of near-term quantum error-correction experiments with mobile spin qubits.</p>

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Weight-four parity checks in a spin-shuttling architecture

  • Brennan Undseth,
  • Nicola Meggiato,
  • Yi-Hsien Wu,
  • Sam R. Katiraee-Far,
  • Larysa Tryputen,
  • Sander L. de Snoo,
  • Davide Degli Esposti,
  • Giordano Scappucci,
  • Eliška Greplová,
  • Lieven M. K. Vandersypen

摘要

Recent advances in coherent spin shuttling have made sparse semiconductor spin-qubit arrays an appealing solid-state platform to realize quantum processors17. The dynamic and long-range connectivity enabled by shuttling is also essential for many quantum error-correction schemes810. Here we demonstrate a silicon spin-qubit device comprising a shuttling bus for coherently transporting qubits that can interact at four isolated locations that we call bus stops. We dynamically populate the array and tune all single- and two-qubit operations using shuttling and quantum non-demolition spin measurements, without access to charge sensing in most of the device. We achieve universal control of the effective five-qubit processor and select the connectivity required to form a surface-code stabilizer plaquette that supports X- and Z-type parity checks up to weight four. We use the parity checks to generate multi-qubit entanglement between all qubit combinations in the array and report the genuine entanglement of a five-qubit Greenberger–Horne–Zeilinger state, constituting one of the largest such states constructed with gate-defined semiconductor spins. The protocols developed here lay the groundwork for modular calibration and operation of sparse spin-qubit arrays, and we highlight the feasibility of near-term quantum error-correction experiments with mobile spin qubits.