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<p>Although reconfigurable van der Waals devices featuring flexible logic transformation offer a promising strategy toward adaptable architectures to accommodate diverse computational demands, reliable polarity control and scalable integration remain challenging. Here, we demonstrate a reconfigurable field-effect transistor based on the scalable dielectric oxide-van der Waals quasi-floating-gate configuration, enabling nonvolatile polarity switching and multi-state programmability. Charge trapping engineering in an atomic-layer Al<sub>2</sub>O<sub>3</sub>/HfO<sub>2</sub>/Al<sub>2</sub>O<sub>3</sub> dielectric stack achieves performance with nonvolatile conductance update (&gt;6-bits for 1000 s), robust endurance (&gt;3 × 10<sup>5</sup> cycles), and well-balanced electron/hole transport (current mismatch ratio ~ 1%). TCAD simulation and surface potential analysis reveal oxygen vacancies-dominated polarity switching dynamics. Using&#xa0;a silicon-compatible top-gate dielectric process and complementary design, diverse logic gates—including eight Boolean operations and seamless AND-OR-Invert/OR-AND-Invert transformations—are accommodated into compact reconfigurable logic-in-memory circuits. These transistors also simplify ternary content-addressable memory design, underscoring their potential for efficient logic-in-memory computing.</p>

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Dielectric stacking-engineered scalable reconfigurable transistor platform for adaptive logic circuits

  • 期刊论文

  • 出版模式：

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  • 发表日期：

    2026年7月24日

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  • Pengfei Zhu,
  • Chi Zhang,
  • Jingbo Yang,
  • You-Wei Guo,
  • Shida Huo,
  • Enxiu Wu,
  • Fei Wang,
  • Che-Yi Lin,
  • Jyun-Hong Chen,
  • Hongling Chu,
  • Zhaorui Liu,
  • Song Zhao,
  • Jun Li,
  • Mengjiao Li,
  • Yen-Fu Lin,
  • Jianhua Zhang

摘要

Although reconfigurable van der Waals devices featuring flexible logic transformation offer a promising strategy toward adaptable architectures to accommodate diverse computational demands, reliable polarity control and scalable integration remain challenging. Here, we demonstrate a reconfigurable field-effect transistor based on the scalable dielectric oxide-van der Waals quasi-floating-gate configuration, enabling nonvolatile polarity switching and multi-state programmability. Charge trapping engineering in an atomic-layer Al2O3/HfO2/Al2O3 dielectric stack achieves performance with nonvolatile conductance update (>6-bits for 1000 s), robust endurance (>3 × 105 cycles), and well-balanced electron/hole transport (current mismatch ratio ~ 1%). TCAD simulation and surface potential analysis reveal oxygen vacancies-dominated polarity switching dynamics. Using a silicon-compatible top-gate dielectric process and complementary design, diverse logic gates—including eight Boolean operations and seamless AND-OR-Invert/OR-AND-Invert transformations—are accommodated into compact reconfigurable logic-in-memory circuits. These transistors also simplify ternary content-addressable memory design, underscoring their potential for efficient logic-in-memory computing.