Scholarlink

<p>Silicon spin qubits are a promising platform for quantum computing due to their high coherence, controllability, and CMOS manufacturability, yet scalable implementations have so far been limited to a few qubits. Here, to take a step towards larger qubit systems, we tune and coherently control an eight-dot linear array of silicon spin qubits fabricated in a 300 mm CMOS-compatible foundry process, establishing operational scalability beyond the two-qubit regime. All eight qubits are successfully tuned and characterized as four double-dot pairs, exhibiting Ramsey dephasing times <InlineEquation ID="IEq1"> <EquationSource Format="TEX">\({T}_{2}^{*}\)</EquationSource> <EquationSource Format="MATHML"><math> <msubsup> <mrow> <mi>T</mi> </mrow> <mrow> <mn>2</mn> </mrow> <mrow> <mo>*</mo> </mrow> </msubsup> </math></EquationSource> </InlineEquation> up to 41(2) <i>μ</i>s and Hahn-echo coherence times <InlineEquation ID="IEq2"> <EquationSource Format="TEX">\({T}_{2}^{{{{\rm{Hahn}}}}}\)</EquationSource> <EquationSource Format="MATHML"><math> <msubsup> <mrow> <mi>T</mi> </mrow> <mrow> <mn>2</mn> </mrow> <mrow> <mi mathvariant="normal">Hahn</mi> </mrow> </msubsup> </math></EquationSource> </InlineEquation> up to 1.31(4) ms. Readout of the central four qubits is achieved via a cascaded charge-sensing protocol, enabling high-fidelity measurements of the entire multi-qubit array in a two step process. Additionally, we demonstrate a two-qubit gate operation between adjacent qubits with low phase noise. We show that silicon spin qubit arrays can be scaled to medium-sized arrays of 8 qubits while maintaining system coherence.</p>

错误：搜索内容不能为空，请输入英文关键词
错误：关键词超出字数限制，请精简
高级检索

Eight-qubit operation of a 300 mm SiMOS foundry-fabricated device

  • 期刊论文

  • 出版模式：

    开放获取

  • 发表日期：

    2026年7月9日

查看全文
  • Andreas Nickl,
  • Nard Dumoulin Stuyck,
  • Paul Steinacker,
  • Jesus D. Cifuentes,
  • Santiago Serrano,
  • MengKe Feng,
  • Ensar Vahapoglu,
  • Fay E. Hudson,
  • Kok Wai Chan,
  • Stefan Kubicek,
  • Julien Jussot,
  • Yann Canvel,
  • Sofie Beyne,
  • Yosuke Shimura,
  • Roger Loo,
  • Clement Godfrin,
  • Bart Raes,
  • Sylvain Baudot,
  • Danny Wan,
  • Arne Laucht,
  • Chih-Hwan Yang,
  • Wee Han Lim,
  • Andre Saraiva,
  • Christopher C. Escott,
  • Kristiaan De Greve,
  • Andrew S. Dzurak,
  • Tuomo Tanttu

摘要

Silicon spin qubits are a promising platform for quantum computing due to their high coherence, controllability, and CMOS manufacturability, yet scalable implementations have so far been limited to a few qubits. Here, to take a step towards larger qubit systems, we tune and coherently control an eight-dot linear array of silicon spin qubits fabricated in a 300 mm CMOS-compatible foundry process, establishing operational scalability beyond the two-qubit regime. All eight qubits are successfully tuned and characterized as four double-dot pairs, exhibiting Ramsey dephasing times \({T}_{2}^{*}\) T 2 * up to 41(2) μs and Hahn-echo coherence times \({T}_{2}^{{{{\rm{Hahn}}}}}\) T 2 Hahn up to 1.31(4) ms. Readout of the central four qubits is achieved via a cascaded charge-sensing protocol, enabling high-fidelity measurements of the entire multi-qubit array in a two step process. Additionally, we demonstrate a two-qubit gate operation between adjacent qubits with low phase noise. We show that silicon spin qubit arrays can be scaled to medium-sized arrays of 8 qubits while maintaining system coherence.