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<p>We present a multistack design of ultra-thin germanium-on-silicon (Ge-on-Si) photodetectors (PDs) featuring both backside-illuminated (BSI) and top-illuminated architectures, optimized for operation in the 1.0–1.4&#xa0;μm wavelength range. Using Monte Carlo molecular dynamics simulations, we evaluate the effects of doping profiles and biasing on device performance. A Ge absorption layer with a thickness of 350&#xa0;nm enables high-speed operation exceeding 60&#xa0;GHz, while nanostructures integrated at the bottom of the Ge layer enhance optical absorption efficiency to as high as 80%. The BSI design supports vertical integration with electronic wafers, facilitating compact, low-latency signal processing and transmission—particularly beneficial for optical interconnects in data centers and other high-performance computing environments. We also perform a comparative analysis of BSI and top-illuminated designs, highlighting the performance trade-offs and integration advantages in high-speed, vertically stacked, co-packaged optics. These results offer a compact, CMOS (Complementary Metal-Oxide-Semiconductor) -compatible solution for high-speed optical interconnects in future hyperscale data centers.</p>

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Stacked co-packaged Si-Ge-Si photodetectors with > 60 GHz bandwidth for near-infrared wavelength-simulation

  • 期刊论文

  • 出版模式：

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  • 发表日期：

    2025年11月29日

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  • E. P. Devine,
  • Toshishige Yamada,
  • Shih-Yuan Wang,
  • M. Saif Islam

摘要

We present a multistack design of ultra-thin germanium-on-silicon (Ge-on-Si) photodetectors (PDs) featuring both backside-illuminated (BSI) and top-illuminated architectures, optimized for operation in the 1.0–1.4 μm wavelength range. Using Monte Carlo molecular dynamics simulations, we evaluate the effects of doping profiles and biasing on device performance. A Ge absorption layer with a thickness of 350 nm enables high-speed operation exceeding 60 GHz, while nanostructures integrated at the bottom of the Ge layer enhance optical absorption efficiency to as high as 80%. The BSI design supports vertical integration with electronic wafers, facilitating compact, low-latency signal processing and transmission—particularly beneficial for optical interconnects in data centers and other high-performance computing environments. We also perform a comparative analysis of BSI and top-illuminated designs, highlighting the performance trade-offs and integration advantages in high-speed, vertically stacked, co-packaged optics. These results offer a compact, CMOS (Complementary Metal-Oxide-Semiconductor) -compatible solution for high-speed optical interconnects in future hyperscale data centers.