<p>Recent years have witnessed significant research efforts towards integrating Artificial Intelligence (AI) and Machine Learning (ML) techniques into the Very Large Scale Integration (VLSI) chip design cycle in order to improve the performance, efficiency, and power consumption. This article reviews the classical VLSI design methodology, discusses the challenges associated with the conventional design flows, and examines how AI/ML techniques can address these challenges and enhance the design productivity. The paper surveys a range of ML models and their applications across multiple stages of the chip design flow, including design space exploration, physical design optimization, performance prediction, and power optimization. In particular, the existing research is organized into three broad categories: (i) design result estimation, (ii) design optimization and correction, and (iii) design construction. For each category, representative ML techniques and their roles in improving the design efficiency and prediction accuracy are discussed. In addition, the survey highlights the recent developments in low-power VLSI design, including the emerging transistor architectures, advanced power-optimization strategies, and new energy-efficient computing paradigms, along with the growing role of AI/ML in these domains. The study further discusses how AI/ML approaches can automate the complex design tasks, accelerate design cycles, and improve the overall design quality. The paper also outlines the key challenges in integrating AI/ML into the existing electronic design automation (EDA) workflows, particularly the issues related to the data availability, data quality, and model generalization. Finally, potential research directions are identified to facilitate the broader adoption of AI/ML-driven methodologies in future VLSI design.</p>