<p>The introduction of ultra-thin-body (UTB) oxide semiconductors offers an attractive route toward back-end-of-line compatible electronics and advanced display backplanes because of their immunity to short-channel effects, low leakage current, and high process compatibility. However, compared with conventional thick oxide channels, UTB devices often exhibit degraded mobility and stability, and the trade-offs between key performance indicators become more pronounced. Here, we demonstrate the fundamental roles of structural relaxation and non-lattice oxygen (O<sub>NL</sub>) in governing the performance–stability trade-off of sol–gel UTB indium oxide (In<sub>2</sub>O<sub>3</sub>) thin-film transistors (TFTs) through modulation of the annealing time (t<sub>A</sub>). As t<sub>A</sub> increases, structural relaxation progresses, as evidenced by contraction of the d-spacing and an increase in crystallite size. In contrast, the O<sub>NL</sub> component shows non-monotonic evolution, with a decrease at intermediate t<sub>A</sub> followed by a rebound at longer t<sub>A</sub>. The t<sub>A</sub> dependences of subthreshold swing (SS) and mobility correlate with the evolution of O<sub>NL</sub>, which highlights its significant impact on device characteristics. Under strong positive bias stress, increasing t<sub>A</sub> continuously and effectively suppresses overall device degradation. Notably, this stability trend differs from that of the initial electrical characteristics, which supports that the interplay between t<sub>A</sub>-driven structural relaxation and O<sub>NL</sub> represents a primary origin of the performance–stability trade-off in UTB TFTs. As a result, an optimal t<sub>A</sub> processing window is identified to balance electrical performance and stability. Annealing-time engineering of UTB oxide TFTs, therefore, provides both physical insight into degradation pathways and parameter trade-offs, and a practical process optimization strategy for applications constrained by thermal budget.</p>

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Role of structural relaxation and non-lattice oxygen in solution-processed ultra-thin-body crystalline indium oxide transistors

  • Jae Wook Ahn,
  • Dohyeon Gil,
  • Se Jin Park,
  • Jinhong Park,
  • Minsu Choi,
  • Qianying Zhou,
  • Jaewon Jang,
  • In Man Kang,
  • Honghwi Park,
  • Jin-Hyuk Bae,
  • Do-Kyung Kim

摘要

The introduction of ultra-thin-body (UTB) oxide semiconductors offers an attractive route toward back-end-of-line compatible electronics and advanced display backplanes because of their immunity to short-channel effects, low leakage current, and high process compatibility. However, compared with conventional thick oxide channels, UTB devices often exhibit degraded mobility and stability, and the trade-offs between key performance indicators become more pronounced. Here, we demonstrate the fundamental roles of structural relaxation and non-lattice oxygen (ONL) in governing the performance–stability trade-off of sol–gel UTB indium oxide (In2O3) thin-film transistors (TFTs) through modulation of the annealing time (tA). As tA increases, structural relaxation progresses, as evidenced by contraction of the d-spacing and an increase in crystallite size. In contrast, the ONL component shows non-monotonic evolution, with a decrease at intermediate tA followed by a rebound at longer tA. The tA dependences of subthreshold swing (SS) and mobility correlate with the evolution of ONL, which highlights its significant impact on device characteristics. Under strong positive bias stress, increasing tA continuously and effectively suppresses overall device degradation. Notably, this stability trend differs from that of the initial electrical characteristics, which supports that the interplay between tA-driven structural relaxation and ONL represents a primary origin of the performance–stability trade-off in UTB TFTs. As a result, an optimal tA processing window is identified to balance electrical performance and stability. Annealing-time engineering of UTB oxide TFTs, therefore, provides both physical insight into degradation pathways and parameter trade-offs, and a practical process optimization strategy for applications constrained by thermal budget.