<p>This paper investigates pulse-width modulation (PWM) strategies for an asymmetric three-level T-type neutral-point-clamped (A3L T-NPC) inverter derived from the conventional topology. The proposed converter consists of one two-level half-bridge leg and two three-level T-type NPC legs, forming a cost-effective asymmetric structure that reduces the number of semiconductor devices while maintaining three-level output-voltage capability. However, unlike the conventional three-level NPC inverter, the A3L T-NPC inverter only generates six distinct small voltage vectors without redundancy, and some medium voltage vectors are unavailable in specific sectors of the space-vector diagram. As a result, its voltage synthesis capability is limited, reducing the effectiveness of conventional carrier-based PWM methods and potentially increasing output-voltage distortion. To address this issue, a new space-vector pulse-width modulation (SVPWM) strategy based on the three-nearest-vector principle is proposed to improve the quality of the output waveform. The proposed method preserves the nearest-vector synthesis mechanism to reduce harmonic distortion while naturally operating in discontinuous PWM mode, thereby reducing switching losses. In addition, the proposed SVPWM strategy is implemented using a carrier-based modulation technique that exploits the intrinsic relationship between space-vector modulation and carrier-based modulation, enabling a simple, practical implementation. The effectiveness of the proposed method is verified through detailed simulation and experimental results. Furthermore, switching loss, efficiency, and thermal performance are evaluated using the PLECS simulation platform. The results confirm that the proposed modulation method improves harmonic performance and efficiency, demonstrating the practical feasibility of the A3L T-NPC inverter as a cost-effective solution for applications requiring high-quality output waveforms and improved efficiency.</p>