Design Optimization and Hartley Modulation Technique for Parameter Estimation in a Customized Multi Level Inverter Fed Permanent Magnet Synchronous Motor
摘要
With an emphasis on optimizing torque angle, internal power factor angle, and field orientation control, this paper offers a thorough analysis of the design techniques and parameter estimation for customized multi-level inverter coupled with permanent magnet synchronous motor (PMSM). This approach takes advantage of the PMSM’s innate flexibility to produce the same torque for a variety of current combinations. Because multi-level inverters have lower harmonic distortion and higher voltage resolution, they can drive a PMSM’s more effectively and efficiently. In order to enhance motor performance, this research presents a methodical approach to the design of these inverters, with an emphasis on the internal power factor angle and torque angle alignment for increasing torque output, better power factor angle and enhancing motor performance. In order to provide an exact control and a dependable operation of the inverter-motor system, the research incorporates approaches for precise estimation of parameters. This work uses the Hartley modulation technique to investigate the parameter estimation of PMSM’s. The durability and efficiency of the Hartley modulation approach are used to improve parameter identification precision. The results demonstrate how integrating control mechanisms with multilevel technology can lead to improved motor performance and efficiency. This paper introduces a new mathematical equation for PMSM design with integrating the dynamic equations of the PMSM and the inverter. The outcomes demonstrate how well the Hartley modulation technique works to provide precise and trustworthy parameter estimations, which enhances motor function and control. The performance characteristics of above three schemes can be established and validated with the help of MATLAB/simulation for operating the inverter coupled PMSM under various power factors in the range of lagging to leading via a unity power factor. The proposed method is validated with experimental setup using Spartan-3E FPGA controller. The optimization of control strategies for the multi-level inverter fed PMSM is implemented and tested using Xilinx’s simulation tools to ensure the system operates within the desired performance parameters.