<p>1.2&#xa0;kV P-shielded Split Gate SiC MOSFETs (PSG-MOSFETs) were designed to achieve a reduced reverse transfer capacitance (C_rss) and to effectively suppress electric field crowding at the gate oxide. The formation of the P-shielding region of PSG-MOSFETs was achieved without the necessity of an additional photo mask. The effect of the maximum electric field at the gate oxide (E_ox,max) and specific on-resistance (R_on,sp) by the P-shielding region was investigated by varying the width of the P-shielding region (W_P). As the W_P increases, the E_ox,max is reduced due to the suppression of the electric field at the gate oxide. Conversely, the R_on,sp increases due to the narrower current path in the JFET region. Furthermore, a comparative analysis of the simulated C_rss and gate-drain charge was conducted, and the reduced total switching energy losses (E_total) of PSG-MOSFETs were verified via the simulation of a double pulse test. The PSG-MOSFET exhibited lower E_ox,max, C_rss, and E_total in comparison to the Split Gate SiC MOSFET.</p>