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<p>Quantum dot Cellular Automata (QCA) has emerged as a perfect substitute of conventional CMOS technology as it offers exceptionally minimal power dissipation and operation at ultra-high frequency range. Logic circuit designs with CMOS technology uses the traditional computations are irreversible in nature and hence dissipates power due to information loss. The information loss is serious concern in irreversible digital domain and is directly associated with the power dissipation. Reversible computing is a promising computational paradigm where no information is lost and ideally dissipates no power. Adders and subtractors are the primitive components in digital systems and are used to perform essential operations in arithmetic and logic units (ALUs), digital signal processing and various mathematical functions. Previous implementations of QCA based adders and subtractors faced certain limitations viz. high cell count, increased energy dissipation, complexity and robustness which have impacted their efficiency. This paper proposes the optimized design of reversible full Adder-Subtractor (ORFAS) based on the novel 3-input XOR gate. The designs presented do not necessitate any rotated cells or crossovers and utilize a single layer cell design, enhancing the manufacturability. The optimized adder-subtractor circuit require only 77 cells for realization and generates single garbage output. The proposed ORFAS gate stands due to its enhanced fault-tolerant design, which has been rigorously analyzed to ensure high reliability and resilience by continuing to function in various fault scenarios. The fault tolerance of the proposed ORFAS layout is 97%, which indicates a high level of resilience or reliability. The energy dissipation analysis was carried out using QCADesigner-E. In addition, the total energy dissipation values obtained are 4.19 × 10<sup>–2</sup>&#xa0;eV with average energy dissipation of 3.80 × 10<sup>–3</sup>&#xa0;eV which is notably 16% lower than the finest previously reported design. Both QCADesigner 2.0.3 and QCADesigner-E tools, have been utilized for comphrensive assessment and validating the results.</p>

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Towards the Modelling of Robust Nano-Scale Optimized Reversible Full Adder-Subtractor Using QCA Technology

  • 期刊论文

  • 发表日期：

    2025年2月10日

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  • Javeed Iqbal Reshi,
  • Farooq A. Khanday,
  • M. Tariq Banday

摘要

Quantum dot Cellular Automata (QCA) has emerged as a perfect substitute of conventional CMOS technology as it offers exceptionally minimal power dissipation and operation at ultra-high frequency range. Logic circuit designs with CMOS technology uses the traditional computations are irreversible in nature and hence dissipates power due to information loss. The information loss is serious concern in irreversible digital domain and is directly associated with the power dissipation. Reversible computing is a promising computational paradigm where no information is lost and ideally dissipates no power. Adders and subtractors are the primitive components in digital systems and are used to perform essential operations in arithmetic and logic units (ALUs), digital signal processing and various mathematical functions. Previous implementations of QCA based adders and subtractors faced certain limitations viz. high cell count, increased energy dissipation, complexity and robustness which have impacted their efficiency. This paper proposes the optimized design of reversible full Adder-Subtractor (ORFAS) based on the novel 3-input XOR gate. The designs presented do not necessitate any rotated cells or crossovers and utilize a single layer cell design, enhancing the manufacturability. The optimized adder-subtractor circuit require only 77 cells for realization and generates single garbage output. The proposed ORFAS gate stands due to its enhanced fault-tolerant design, which has been rigorously analyzed to ensure high reliability and resilience by continuing to function in various fault scenarios. The fault tolerance of the proposed ORFAS layout is 97%, which indicates a high level of resilience or reliability. The energy dissipation analysis was carried out using QCADesigner-E. In addition, the total energy dissipation values obtained are 4.19 × 10–2 eV with average energy dissipation of 3.80 × 10–3 eV which is notably 16% lower than the finest previously reported design. Both QCADesigner 2.0.3 and QCADesigner-E tools, have been utilized for comphrensive assessment and validating the results.