<p>Kesterite Cu<sub>2</sub>ZnSn(S,Se)<sub>4</sub> (CZTSSe) solar cells suffer from significant open-circuit voltage (<i>V</i><sub>OC</sub>) deficits due to severe interfacial and bulk recombination, restricting their power conversion efficiency (PCE) far below the Shockley-Queisser limit. This work proposes a low-temperature annealing strategy during ITO sputtering (SA) to synergistically address these challenges. The temperature applied during ITO sputtering not only improves the crystallinity, carrier concentration, and optical transmittance of the ITO layer but also promotes the diffusion of In from ITO into both CdS and CZTSSe layers. Consequently, lattice matching at the CZTSSe/CdS interface is optimized, enabling epitaxial growth. And a favorable ITO/In:CdS/In&amp;Cd:CZTSSe structure with optimal band alignment is obtained. As a result, a champion device with a PCE of 14.29% was achieved. The SA-treating also enabled the CZTSSe solar cells to achieve the highest <i>V</i><sub>OC</sub> reported to date, exceeding 590 mV. This underscores the essential role of SA processing in optimizing interface engineering and suppressing defects, thus promoting the development of low-cost, high-performance kesterite photovoltaics.</p>

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Efficient CZTSSe solar cells with the highest VOC of 591 mV enabled by thermal sputtering ITO

  • Tong Liu,
  • Litao Han,
  • Lunan Pei,
  • Xinyi Zhong,
  • Wentong Yang,
  • Kelin Leng,
  • Qiang Zeng,
  • Dongxing Kou,
  • Zhengji Zhou,
  • Fangyang Liu,
  • Sixin Wu

摘要

Kesterite Cu2ZnSn(S,Se)4 (CZTSSe) solar cells suffer from significant open-circuit voltage (VOC) deficits due to severe interfacial and bulk recombination, restricting their power conversion efficiency (PCE) far below the Shockley-Queisser limit. This work proposes a low-temperature annealing strategy during ITO sputtering (SA) to synergistically address these challenges. The temperature applied during ITO sputtering not only improves the crystallinity, carrier concentration, and optical transmittance of the ITO layer but also promotes the diffusion of In from ITO into both CdS and CZTSSe layers. Consequently, lattice matching at the CZTSSe/CdS interface is optimized, enabling epitaxial growth. And a favorable ITO/In:CdS/In&Cd:CZTSSe structure with optimal band alignment is obtained. As a result, a champion device with a PCE of 14.29% was achieved. The SA-treating also enabled the CZTSSe solar cells to achieve the highest VOC reported to date, exceeding 590 mV. This underscores the essential role of SA processing in optimizing interface engineering and suppressing defects, thus promoting the development of low-cost, high-performance kesterite photovoltaics.