Impact of interface states and series resistance on the electrical and dielectric response of ECR-PECVD SiO₂/p-Si MOS structures
摘要
In this work, we examine the electrical and dielectric characteristics of the SiO₂ oxide layer that was produced using the ECR-PECVD method on a p-Si substrate. The frequency range of 100 Hz–1 MHz has been used to record capacitance–voltage (C-Vg) and conductance-voltage (G/ω-Vg) properties. The interface states (Nss) and series resistance (Rs) effects are associated with anomalous peaks in the C-Vg and G-Vg plots. It demonstrates how the capacitance at low frequencies is influenced by the interface state. Because the interface state capacitance decreases with increasing frequency, the effect of series resistance on capacitance becomes noticeable at higher frequencies. In addition, the frequency dependence of dielectric constants (ε’, ε”), dielectric loss tangent (tanδ), electric modulus (M', M''), and the electrical conductivity (σac) is also studied for the Al/SiO2/p-Si (MOS) structure. The double logarithmic σac-w curve shows linear behavior, with its slope around 0.66 to 0.26, and this value of Al/SiO2/p-Si (MOS) structure has a high AC conductivity.