<p>This article focuses on the FPGA implementation of a Hybrid-Fibonacci Linear Feedback Shift Register (H-FLFSR) over extended fields (2<sup>n</sup>) tailored for cryptographic applications, utilizing Xilinx Vivado as the primary development tool. The H-FLFSR combines both Fibonacci and traditional feedback structures to enhance the quality of the generated pseudo-random sequences when compared to traditional LFSRs. The proposed 16 bit hybrid LFSR is optimized for speed and area and it is able to generate pseudorandom bit sequence with improved randomness. The H-FLFSR is implemented using a combination of flip-flops to store the state of the LFSR and logic gates to implement the feedback function. Comparative analysis is performed with traditional LFSR and result shows the proposed H-FLFSR consumes 86.87% and 15.92% of dynamic and static power when compared to conventional LFSR.</p>

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A Novel Hybrid Fibonacci Linear Feedback Shift Register for Cryptographic Applications

  • R. Gowrishankar,
  • B. Senthilkumar

摘要

This article focuses on the FPGA implementation of a Hybrid-Fibonacci Linear Feedback Shift Register (H-FLFSR) over extended fields (2n) tailored for cryptographic applications, utilizing Xilinx Vivado as the primary development tool. The H-FLFSR combines both Fibonacci and traditional feedback structures to enhance the quality of the generated pseudo-random sequences when compared to traditional LFSRs. The proposed 16 bit hybrid LFSR is optimized for speed and area and it is able to generate pseudorandom bit sequence with improved randomness. The H-FLFSR is implemented using a combination of flip-flops to store the state of the LFSR and logic gates to implement the feedback function. Comparative analysis is performed with traditional LFSR and result shows the proposed H-FLFSR consumes 86.87% and 15.92% of dynamic and static power when compared to conventional LFSR.