<p>This paper proposes a Hetero-Gate-Tri-Oxide Symmetric U-Shaped Tunnel Field-Effect Transistor (HGTO-SUTFET) for ultra-low-power applications. To achieve enhanced electrostatic control and effective suppression of ambipolar conduction, a stacked high-<i>k</i> dual-oxide gate dielectric <InlineEquation ID="IEq1"> <EquationSource Format="TEX">\(HfO_2\)</EquationSource> </InlineEquation>/<InlineEquation ID="IEq2"> <EquationSource Format="TEX">\(TiO_2\)</EquationSource> </InlineEquation> and stacked low-<i>k</i> dielectric <InlineEquation ID="IEq3"> <EquationSource Format="TEX">\(ZrO_2\)</EquationSource> </InlineEquation>/<InlineEquation ID="IEq4"> <EquationSource Format="TEX">\(TiO_{2}\)</EquationSource> </InlineEquation> are employed near the source and drain regions, respectively. HGTO-SUTFET utilizes p<InlineEquation ID="IEq5"> <EquationSource Format="TEX">\(^{+}\)</EquationSource> </InlineEquation> doped GaAs and p<InlineEquation ID="IEq6"> <EquationSource Format="TEX">\(^{+}\)</EquationSource> </InlineEquation> doped Ge as the source and drain materials, respectively, along with an n-type InGaAs channel. This framework enhances the carrier mobility and band-to-band tunneling (BTBT). Besides, an n<InlineEquation ID="IEq7"> <EquationSource Format="TEX">\(^{+}\)</EquationSource> </InlineEquation> pocket is employed, which enhances the tunneling electric field and achieves improved <InlineEquation ID="IEq8"> <EquationSource Format="TEX">\(I_{ON}\)</EquationSource> </InlineEquation> of <InlineEquation ID="IEq9"> <EquationSource Format="TEX">\(4.2\times 10^{-5}\)</EquationSource> </InlineEquation> A/<InlineEquation ID="IEq10"> <EquationSource Format="TEX">\(\mu \)</EquationSource> </InlineEquation>m, <InlineEquation ID="IEq11"> <EquationSource Format="TEX">\(I_{OFF}\)</EquationSource> </InlineEquation> of <InlineEquation ID="IEq12"> <EquationSource Format="TEX">\(1.38\times 10^{-19}\)</EquationSource> </InlineEquation> A/<InlineEquation ID="IEq13"> <EquationSource Format="TEX">\(\mu \)</EquationSource> </InlineEquation>m, an <InlineEquation ID="IEq14"> <EquationSource Format="TEX">\(I_{ON}\)</EquationSource> </InlineEquation>/<InlineEquation ID="IEq15"> <EquationSource Format="TEX">\(I_{OFF}\)</EquationSource> </InlineEquation> ratio of <InlineEquation ID="IEq16"> <EquationSource Format="TEX">\(3.1\times 10^{14}\)</EquationSource> </InlineEquation>, and subthreshold swing (SS) of 4.4 mV/decade. The obtained results confirm that the proposed HGTO-SUTFET exhibits significant potential for low-power, high-speed applications.</p>

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A Steep Hetero-Gate-Tri-Oxide-Symmetric U-Shaped TFET for Low Power Applications

  • Shabya Gupta,
  • Sonu Goyal,
  • Pallavi Mittal,
  • Sachin Agrawal

摘要

This paper proposes a Hetero-Gate-Tri-Oxide Symmetric U-Shaped Tunnel Field-Effect Transistor (HGTO-SUTFET) for ultra-low-power applications. To achieve enhanced electrostatic control and effective suppression of ambipolar conduction, a stacked high-k dual-oxide gate dielectric \(HfO_2\) / \(TiO_2\) and stacked low-k dielectric \(ZrO_2\) / \(TiO_{2}\) are employed near the source and drain regions, respectively. HGTO-SUTFET utilizes p \(^{+}\) doped GaAs and p \(^{+}\) doped Ge as the source and drain materials, respectively, along with an n-type InGaAs channel. This framework enhances the carrier mobility and band-to-band tunneling (BTBT). Besides, an n \(^{+}\) pocket is employed, which enhances the tunneling electric field and achieves improved \(I_{ON}\) of \(4.2\times 10^{-5}\) A/ \(\mu \) m, \(I_{OFF}\) of \(1.38\times 10^{-19}\) A/ \(\mu \) m, an \(I_{ON}\) / \(I_{OFF}\) ratio of \(3.1\times 10^{14}\) , and subthreshold swing (SS) of 4.4 mV/decade. The obtained results confirm that the proposed HGTO-SUTFET exhibits significant potential for low-power, high-speed applications.