Homogeneous Clustered DSDV Routing for Mobile Ad Hoc Network Communication
摘要
The research aims to design the hardware chip for the Homogeneous Clustered Destination-Sequenced Distance-Vector (HMC-DSDV) routing protocol for Mobile Ad Hoc Networks (MANETs). Homogeneous clustering supports parallel processing and distributes the computing load evenly across the clusters. This reduces the need for complex and centralized processing and routing in MANET. The novelty and main contribution of the study is a scalable network design with a reconfigurable architecture implemented on a Field-Programmable Gate Array (FPGA). The FPGA platform evaluates the network’s performance, hardware utilization, and timing constraints. Using the proposed HMC-DSDV protocol, hardware resources were used more efficiently: slices, LUTs, and flip-flops were reduced by 22.8% to 27.6%. The performance metrics are also improved: delay decreased by 17.4%, throughput increased by 22.6%, and control overhead dropped by 25.7%. The prototype operated at a maximum frequency of 285.00 MHz and achieved an approximate packet-delivery ratio of 1.00.