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<p>Ferroelectric-based devices are attracting renewed interest as promising building blocks for next-generation non-volatile memory and neuromorphic computing. This review focuses on two-terminal ferroelectric memristive and memcapacitive devices, discussing their material foundations, device physics, and implications at the array level. After briefly introducing classical perovskite ferroelectrics, we highlight the emergence of HfO<sub>2</sub>-based, particularly Hf<sub>x</sub>Zr<sub>1−x</sub>O<sub>2</sub> (HZO), ferroelectrics, which combine robust polarization with excellent complementary metal-oxide-semiconductor (CMOS) compatibility and aggressive thickness scaling. We then classify representative ferroelectric devices, including ferroelectric tunnel junctions, ferroelectric diodes, and ferroelectric-based memcapacitive structures, and compare their operation mechanisms along with the resulting device characteristics. From a device-level perspective, ferroelectric memristive devices are compared with conventional two-terminal memories, such as resistive random-access memories (ReRAMs), phase-change memories (PCMs), and magnetic tunnel junctions (MTJs), in terms of energy efficiency, switching speed, multilevel capability, and reliability. We further discuss the strengths of ferroelectric devices, with an emphasis on their suitability for crossbar-based in-memory and neuromorphic computing. Building on this, we introduce ferroelectric memcapacitive devices as a distinct class that differs from memristive ferroelectric devices. This class features polarization-controlled capacitance and displacement-current-based operation, yielding nearly zero static power consumption and intrinsically suppressing direct current (DC) leakage and IR drop. These characteristics offer distinct advantages for energy-efficient vector-matrix multiplication. By consolidating material, device, and array-level perspectives, this review outlines key performance trade-offs and design guidelines for advancing ferroelectric memristive and memcapacitive technologies toward scalable, low-power computing hardware.</p> Graphical Abstract <p></p>

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Mechanism and Evaluation of Two-Terminal Ferroelectric-Based Memristive/Memcapacitive Devices

  • 期刊论文

  • 发表日期：

    2026年2月12日

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  • Hyeon Jin Ahn,
  • Hyung Jin Shin,
  • Na Kyung Yu,
  • Jung Ho Yoon

摘要

Ferroelectric-based devices are attracting renewed interest as promising building blocks for next-generation non-volatile memory and neuromorphic computing. This review focuses on two-terminal ferroelectric memristive and memcapacitive devices, discussing their material foundations, device physics, and implications at the array level. After briefly introducing classical perovskite ferroelectrics, we highlight the emergence of HfO2-based, particularly HfxZr1−xO2 (HZO), ferroelectrics, which combine robust polarization with excellent complementary metal-oxide-semiconductor (CMOS) compatibility and aggressive thickness scaling. We then classify representative ferroelectric devices, including ferroelectric tunnel junctions, ferroelectric diodes, and ferroelectric-based memcapacitive structures, and compare their operation mechanisms along with the resulting device characteristics. From a device-level perspective, ferroelectric memristive devices are compared with conventional two-terminal memories, such as resistive random-access memories (ReRAMs), phase-change memories (PCMs), and magnetic tunnel junctions (MTJs), in terms of energy efficiency, switching speed, multilevel capability, and reliability. We further discuss the strengths of ferroelectric devices, with an emphasis on their suitability for crossbar-based in-memory and neuromorphic computing. Building on this, we introduce ferroelectric memcapacitive devices as a distinct class that differs from memristive ferroelectric devices. This class features polarization-controlled capacitance and displacement-current-based operation, yielding nearly zero static power consumption and intrinsically suppressing direct current (DC) leakage and IR drop. These characteristics offer distinct advantages for energy-efficient vector-matrix multiplication. By consolidating material, device, and array-level perspectives, this review outlines key performance trade-offs and design guidelines for advancing ferroelectric memristive and memcapacitive technologies toward scalable, low-power computing hardware.

Graphical Abstract