A flexible efficient and configurable number theoretic transform architecture implemented on FPGA
摘要
Polynomial multiplication has consistently been the most computationally intensive operation in lattice-based post-quantum cryptography (PQC). Being a critical design component, Number Theoretic Transform (NTT) is leveraged by efficient PQC systems to achieve acceleration. Currently, most NTT designs employ fixed parameters, so this paper proposes an NTT design with user-configurable key parameter values to allow the determination of throughput and resource consumption. Additionally, three different NTT cores were designed to perform modular arithmetic for various types of primes. Special primes utilize a low-latency and resource-efficient core, while general primes are handled by a general-purpose core. These two designs enhancements increase flexibility and enable application in a variety of diverse scenarios. Experimental results indicate that the latency for software-based NTT design is 4.83