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<p>In this article, a novel fault detection, localization and type of faults is proposed for a boost Packed-U-Cell (PUC) multilevel inverter (MLI) to single, double, triple and quadruple open-circuit (OC) and short-circuit (SC) faults across the switching devices. Fault detection is done by comparing the reference voltage with the measured output voltage. If the absolute deviation in voltage is greater than or equal to 1, the output of the up-counter is 1. The type and location of the fault are determined by comparing the reference instantaneous output voltage, current and capacitor voltage, with the measured instantaneous output voltage, current and capacitor voltage. Any slight deviation in the three parameters is calculated and passed through an AND gate. If the conditions mentioned in the look-up table are satisfied, the algorithm's output is 1, 2, 3… 28 otherwise 0. The algorithm can detect and localized the faults within one-fourth of the fundamental cycle and the technique is fastest as compared to other detection techniques. This article implements phase disposition pulse width modulation (PWM). The MLI feasibility is verified by its output voltage, current and capacitor voltage obtained from MATLAB-SIMULINK software and Opal-RT simulator.</p>

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Open-Switch and Short-Switch Fault Diagnosis Technique In a Boost Packed-U-Cell Multilevel Inverter

  • 期刊论文

  • 发表日期：

    2025年12月8日

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  • Hillol Phukan,
  • Dinesh Kumar Tiwari,
  • Jiwanjot Singh,
  • Avadh Pati

摘要

In this article, a novel fault detection, localization and type of faults is proposed for a boost Packed-U-Cell (PUC) multilevel inverter (MLI) to single, double, triple and quadruple open-circuit (OC) and short-circuit (SC) faults across the switching devices. Fault detection is done by comparing the reference voltage with the measured output voltage. If the absolute deviation in voltage is greater than or equal to 1, the output of the up-counter is 1. The type and location of the fault are determined by comparing the reference instantaneous output voltage, current and capacitor voltage, with the measured instantaneous output voltage, current and capacitor voltage. Any slight deviation in the three parameters is calculated and passed through an AND gate. If the conditions mentioned in the look-up table are satisfied, the algorithm's output is 1, 2, 3… 28 otherwise 0. The algorithm can detect and localized the faults within one-fourth of the fundamental cycle and the technique is fastest as compared to other detection techniques. This article implements phase disposition pulse width modulation (PWM). The MLI feasibility is verified by its output voltage, current and capacitor voltage obtained from MATLAB-SIMULINK software and Opal-RT simulator.