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<p>The low-noise amplifier (LNA), which is the first component in the receiver front-end, must attain high gain while minimizing noise at high frequencies. The design of LNA for 5&#xa0;G communication exhibits several limitations, including a relatively low gain at high frequencies, poor gain flatness at peak frequencies, and performance degradation due to deficiencies in the passive networks. This study presents a CMOS LNA design for a frequency range from 24.25 to 27.5 GHz. The LNA utilizes the simultaneous noise and input matching technique with common-source inductive degeneration and cascode with middle inductor topologies to achieve optimum gain while minimizing noise figure. When designing the LNA, the important factors achieve appropriate gain, linearity, and minimizing noise. At a frequency of 26 GHz, a gain of 26.14 dB and NF of 1.96 dB are provided by the proposed LNA. At 1 V supply voltage, the proposed LNA consumes 7.48 mW power. Compared to recent state-of-the-art CMOS designs operating in the same frequency band, which typically exhibit gains of 18–23 dB and noise figures (NF) ranging from 2.0 to 3.5 dB, the proposed design achieves superior performance with a markedly improved gain and NF.</p>

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High-Gain CMOS Low-Noise Amplifier for 5 G Application Using SNIM Technique

  • 期刊论文

  • 发表日期：

    2025年9月1日

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  • R. Sathya,
  • Sunanda Ambulker

摘要

The low-noise amplifier (LNA), which is the first component in the receiver front-end, must attain high gain while minimizing noise at high frequencies. The design of LNA for 5 G communication exhibits several limitations, including a relatively low gain at high frequencies, poor gain flatness at peak frequencies, and performance degradation due to deficiencies in the passive networks. This study presents a CMOS LNA design for a frequency range from 24.25 to 27.5 GHz. The LNA utilizes the simultaneous noise and input matching technique with common-source inductive degeneration and cascode with middle inductor topologies to achieve optimum gain while minimizing noise figure. When designing the LNA, the important factors achieve appropriate gain, linearity, and minimizing noise. At a frequency of 26 GHz, a gain of 26.14 dB and NF of 1.96 dB are provided by the proposed LNA. At 1 V supply voltage, the proposed LNA consumes 7.48 mW power. Compared to recent state-of-the-art CMOS designs operating in the same frequency band, which typically exhibit gains of 18–23 dB and noise figures (NF) ranging from 2.0 to 3.5 dB, the proposed design achieves superior performance with a markedly improved gain and NF.