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<p>Because the information stored in the circuits may be recovered in the event that it is lost, reversible logic is also known as information lossless logic. It has been demonstrated that making computing reversible would prevent energy dissipation. Many reversible gates were created and developed. The D-Flip Flop is built utilizing peres gate and Feynman gates. A 4-bit counter is designed with this designed D flipflop. The proposed method is designed using Verilog code and used to simulate using Xilinx 9.1.The sum of the individual quantum costs of the reversible gates employed in each design determines the overall quantum cost of all the designs. The outcomes are contrasted between the suggested and current methods in terms of garbage inputs and quantum cost.</p>

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Design of a 4-bit counter using reversible logic gates for enhanced security with reduced quantum cost

  • 期刊论文

  • 发表日期：

    2026年4月9日

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  • R. Murugasami,
  • Kannan Nithin Kariyankattil Velukutty,
  • M. Kalidasan,
  • A. Senthilnathan

摘要

Because the information stored in the circuits may be recovered in the event that it is lost, reversible logic is also known as information lossless logic. It has been demonstrated that making computing reversible would prevent energy dissipation. Many reversible gates were created and developed. The D-Flip Flop is built utilizing peres gate and Feynman gates. A 4-bit counter is designed with this designed D flipflop. The proposed method is designed using Verilog code and used to simulate using Xilinx 9.1.The sum of the individual quantum costs of the reversible gates employed in each design determines the overall quantum cost of all the designs. The outcomes are contrasted between the suggested and current methods in terms of garbage inputs and quantum cost.