Atomic-scale mechanisms of electromigration resistance in thickness-dependent micro-bump interconnects
摘要
This study presents a rigorous quantum–mechanical evaluation of the electromigration resistance inherent to Sn-3.5Ag/Cu3Sn/Cu/Ni and Sn-3.5Ag/Cu6Sn5/Cu/Ni micro-bump interconnect architectures subjected to applied electric fields of 0.05 V/Å and 0.1 V/Å. By employing first-principles density functional theory, this investigation quantitatively elucidates the average bond lengths and interfacial adhesion strengths across critical metallurgical boundaries. Specifically, it targets the junctions bridging the solder bump with the copper-tin intermetallic compounds (IMCs), as well as the interfaces separating these IMCs from the under-bump metallurgy (UBM). Furthermore, the research systematically delineates how thickness variations within the Cu3Sn and Cu6Sn5 intermetallic layers modulate intrinsic interfacial bonding characteristics. Computational simulations reveal that structural degradation and interfacial failure preferentially initiate at the boundary bridging the solder bump and the underlying intermetallic layer. Notably, the atomistically predicted interfacial adhesion strength exhibits a monotonic degradation in response to escalating electric field intensities. Moreover, structural analysis indicates that the boundary between the intermetallic layer and the UBM possesses a fundamentally lower thermodynamic adhesion capacity than the solder-intermetallic junction, thereby rendering it highly vulnerable to electromigration-induced cleavage. Consequently, theoretical findings determine that the progressive thickening of copper-tin intermetallic layers compromises the overall electromigration resistance of micro-bump interconnects. Significantly, this theoretical framework establishes a robust atomic-scale understanding of the localized degradation mechanisms that dictate interconnect reliability. These fundamental insights provide vital predictive design paradigms for optimizing interfacial stability and maximizing the operational endurance of next-generation, high-density three-dimensional integrated circuit packaging platforms.