A CMOS low pass filter based on improved current mirror for biomedical application
摘要
In this paper a CMOS low pass filter circuit is designed by OTA using current driving technique. The filter is designed and simulatedin Cadence virtuoso 180 nm gpdk at the supply voltage of 1.8 V. Current driving technique used in the design has improved the gain and decreased the chip area of proposed CMOS-Low Pass Filter. Simulation results show that the designed OTA achieved a wide differntial input range at a low power consumption of 10.34 µW. The filter presents several interesting features, including a DC gain above 85 dB, the capability to operate with a single input supply, and low power consumption in the µW range at a 1.8 V supply voltage. Furthermore, simulation results demonstrate strong thermal stability in the − 40 to + 40 °C temperature range. The filter occupies an area of 0.0039 mm2 with dimensions measuring 63.245 µm × 63.12 µm. The paper includes a comparative analysis of the proposed filter with state-of-the-art OTA filter designs, revealing that the performance of this filter circuit surpasses of all other similar filter types.