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<p>Traditional processing of Circular Polarimetric (Compact Polarimetric)—Synthetic Aperture Radar (CP-SAR) images from the Satellites has been done after receiving the raw data in the Ground Station. The availability of million gate FPGAs has given scope for doing many processing steps on-board itself which has given scope for Smart Small Satellites. The feasibility exists especially for small scenes of interest which have limited data in smaller volumes for ease of processing. National Remote Sensing Centre, Indian Space Research Organisation (NRSC, ISRO) have carried out ground processing with software tools hosted in high performance computers, using the&#xa0;m-delta (δ) decomposition method on the L1-SLC data of CP-SAR payload of RISAT-1 satellite for classification. In our research work, the same data set, and m-delta(ẟ) decomposition method have been chosen for implementation and processing in FPGA fabric, for comparison with earlier Ground based processed results. As part of prototyping, an Intel FPGA evaluation board kit was used. Preliminary results are encouraging and can lead to potential future Smart Small Satellite missions with CP-SAR and on-board processing for direct classification of the scene under imaging for its possible direct delivery to the&#xa0;end user. Major advantage of this approach is the reduction in bandwidth, as&#xa0;the volume of data to be downlinked is reduced, due to lower latency, computational and round-trip times, potential scope for delivery to user with near real-time processing.</p>

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FPGA Processing for m-Delta (ẟ) Decomposition of L1 SLC Images for a Potential Smart Small Satellite Based CP-SAR Mission for Earth Observations

  • 期刊论文

  • 发表日期：

    2025年2月19日

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  • D. V. N. S. N. Murthy,
  • J. K. Kishore,
  • K. Mruthyunjaya Reddy,
  • Stutee Gupta,
  • L. J. Vijayakumar,
  • N. Aparna,
  • H. S. V. Usha Sundari Ryali,
  • P. V. Jayasri,
  • B. K. S. V. L. Varaprasad

摘要

Traditional processing of Circular Polarimetric (Compact Polarimetric)—Synthetic Aperture Radar (CP-SAR) images from the Satellites has been done after receiving the raw data in the Ground Station. The availability of million gate FPGAs has given scope for doing many processing steps on-board itself which has given scope for Smart Small Satellites. The feasibility exists especially for small scenes of interest which have limited data in smaller volumes for ease of processing. National Remote Sensing Centre, Indian Space Research Organisation (NRSC, ISRO) have carried out ground processing with software tools hosted in high performance computers, using the m-delta (δ) decomposition method on the L1-SLC data of CP-SAR payload of RISAT-1 satellite for classification. In our research work, the same data set, and m-delta(ẟ) decomposition method have been chosen for implementation and processing in FPGA fabric, for comparison with earlier Ground based processed results. As part of prototyping, an Intel FPGA evaluation board kit was used. Preliminary results are encouraging and can lead to potential future Smart Small Satellite missions with CP-SAR and on-board processing for direct classification of the scene under imaging for its possible direct delivery to the end user. Major advantage of this approach is the reduction in bandwidth, as the volume of data to be downlinked is reduced, due to lower latency, computational and round-trip times, potential scope for delivery to user with near real-time processing.