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<p>In the field of the Internet of Things (IoT), extensive research is being conducted on establishing wireless communication between implantable devices and biomedical instruments. The transmitters and receivers designed for this purpose must have low power consumption, high levels of integration, and compact size. Antennas designed within a chip and integrated into RF circuits help meet these constraints. In this paper, a receiver front-end consisting of a differential inductorless cascade LNA integrated with a novel 3D on-chip antenna is proposed for the 2.4 GHz ISM band. On-chip antennas designed at lower GHz frequencies typically have low efficiency and occupy large space. To improve efficiency and reduce area, a 3D on-chip antenna is formed using Metal layers 6 and 5, connected via the CMOS substrate stack-up. The inductorless LNA is a cascade of a common-gate (CG) circuit and a folded cascode stage. The CG amplifier includes capacitive cross-coupling at its base to boost gain. Electromagnetic (EM) simulations using the Advanced Design System (ADS) show that the proposed antenna has a gain of -19.18 dBi and an efficiency of 0.57%. This antenna is connected to a low noise amplifier (LNA) designed and simulated in the Cadence Virtuoso tool, achieving a gain of 22.5 dB, a noise figure (NF) of 0.56 dB, and an IIP3 of 0.4 dBm. The design of the on-chip antenna and LNA is carried out in UMC 180 nm technology. The proposed LNA exhibits high gain, very low NF, and high IIP3 compared to other lower GHz LNAs integrated with on-chip antennas. The design has a power consumption of 4.5 mW and occupies an area of 1.6 mm<sup>2</sup>.</p>

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A fully integrated 2.4 GHz inductorless high gain low NF cascade-LNA Co-designed to on-chip 3D antenna for IoT based implantable devices

  • 期刊论文

  • 发表日期：

    2025年10月21日

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  • Archana Sunitha,
  • Bhaskar Manickam

摘要

In the field of the Internet of Things (IoT), extensive research is being conducted on establishing wireless communication between implantable devices and biomedical instruments. The transmitters and receivers designed for this purpose must have low power consumption, high levels of integration, and compact size. Antennas designed within a chip and integrated into RF circuits help meet these constraints. In this paper, a receiver front-end consisting of a differential inductorless cascade LNA integrated with a novel 3D on-chip antenna is proposed for the 2.4 GHz ISM band. On-chip antennas designed at lower GHz frequencies typically have low efficiency and occupy large space. To improve efficiency and reduce area, a 3D on-chip antenna is formed using Metal layers 6 and 5, connected via the CMOS substrate stack-up. The inductorless LNA is a cascade of a common-gate (CG) circuit and a folded cascode stage. The CG amplifier includes capacitive cross-coupling at its base to boost gain. Electromagnetic (EM) simulations using the Advanced Design System (ADS) show that the proposed antenna has a gain of -19.18 dBi and an efficiency of 0.57%. This antenna is connected to a low noise amplifier (LNA) designed and simulated in the Cadence Virtuoso tool, achieving a gain of 22.5 dB, a noise figure (NF) of 0.56 dB, and an IIP3 of 0.4 dBm. The design of the on-chip antenna and LNA is carried out in UMC 180 nm technology. The proposed LNA exhibits high gain, very low NF, and high IIP3 compared to other lower GHz LNAs integrated with on-chip antennas. The design has a power consumption of 4.5 mW and occupies an area of 1.6 mm2.