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<p>The voltage scaling dependencies in communication system designs are effectively reduced with the introduction of Serializer/Deserializer (SerDes) designs. The power fluctuations bring higher impact on the SerDes design with respect to the clock signal structure, which is significantly reduced in the proposed study, with the introduction of a novel Dickson High Swing Charge Pump SerDes. In the existing cascode configuration employed for designing low-dropout regulator (LDO), faces issues related to restricted output swings and hence, in this work an integrated charge pump topology is employed, which combines Cross Coupled Charge Pump and Dickson Charge Pump. Besides, the limitations in the output swing bring insufficient voltage levels, which further provide inadequate drive strength to the components of SerDes. This issue is compensated in the present study by the introduction of current sharing resistors along with the charge pumps, which brings effective current sharing amid the charge pumps, providing sufficient drive strength; also enhances the transconductance, gain and voltage stability of LDO. The integrated charge pump design aids the LDO to tune the voltage based on the dynamic loading conditions, giving out reduced ripples, less power charging efficiency and better system reliability. By implementing the proposed study in MATLAB, the related performance metrics are analysed. The implementation results show that the defined work provides performance in terms of line regulation (4.2 mV), load regulation (0.04 mV), PSRR (–31.5 dB) and dropout voltage (40 mV), thereby assisting in enhancing the stability and reliability of the system with high-speed data transmission.</p>

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Efficient high swing regulator design using charge pump for the high speed SerDes designs

  • 期刊论文

  • 发表日期：

    2025年11月11日

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  • Suresh Nagula,
  • Sreeharirao Patri,
  • Ekta Goel

摘要

The voltage scaling dependencies in communication system designs are effectively reduced with the introduction of Serializer/Deserializer (SerDes) designs. The power fluctuations bring higher impact on the SerDes design with respect to the clock signal structure, which is significantly reduced in the proposed study, with the introduction of a novel Dickson High Swing Charge Pump SerDes. In the existing cascode configuration employed for designing low-dropout regulator (LDO), faces issues related to restricted output swings and hence, in this work an integrated charge pump topology is employed, which combines Cross Coupled Charge Pump and Dickson Charge Pump. Besides, the limitations in the output swing bring insufficient voltage levels, which further provide inadequate drive strength to the components of SerDes. This issue is compensated in the present study by the introduction of current sharing resistors along with the charge pumps, which brings effective current sharing amid the charge pumps, providing sufficient drive strength; also enhances the transconductance, gain and voltage stability of LDO. The integrated charge pump design aids the LDO to tune the voltage based on the dynamic loading conditions, giving out reduced ripples, less power charging efficiency and better system reliability. By implementing the proposed study in MATLAB, the related performance metrics are analysed. The implementation results show that the defined work provides performance in terms of line regulation (4.2 mV), load regulation (0.04 mV), PSRR (–31.5 dB) and dropout voltage (40 mV), thereby assisting in enhancing the stability and reliability of the system with high-speed data transmission.