Material-Driven Performance Analysis of a Vertical Nanowire Tunnel FET for Analog Applications
摘要
This study analyzes the performance of a high-k germanium–silicon-based source–drain vertical nanowire tunnel field-effect transistor (HK-Ge-Si-VNWTFET) for analog/radio frequency (RF) applications under various gate dielectric materials. Ge/Si materials are chosen for the source/drain of the proposed device to enhance the ON-state current (ION), reduce the subthreshold swing (SS), and minimize the OFF-state current (IOFF). The objective of this analysis is to investigate the performance of various proposed VNWTFETs under different gate dielectric conditions. High-k dielectrics (such as In2O3, TiO2 HfO2, Al2O3, Si3N4, SiO2, and ZnO2) are used in device simulation to analyze the impact of high-k dielectrics on heterojunctions. The incorporation of high-k HfO2 increases the tunneling of the charge carriers across the source–channel junction, yielding ION of 2.09 × 10−5 A/μm, IOFF of 1.8 × 10−19 A/μm, ION/IOFF ratio of 1.16 × 1014, SS of 11.8 mV/dec, and cutoff frequency (fT) of 833.6 GHz. The results show that the proposed Ge-Si-based VNWTFETs provide considerable enhancements in analog/RF characteristics in comparison to traditional Si-Si-based VNWTFETs, and they may be a more suitable substitute for upcoming low power devices.