<p>In this work, a synergistic engineering approach involving both progressive and retrograde doping profiles, combined with controlled modulation of the drift layer thickness, is implemented in <InlineEquation ID="IEq10"> <EquationSource Format="TEX">\(\beta \)</EquationSource> <EquationSource Format="MATHML"><math> <mi>β</mi> </math></EquationSource> </InlineEquation>-gallium oxide (<InlineEquation ID="IEq11"> <EquationSource Format="TEX">\(\beta \)</EquationSource> <EquationSource Format="MATHML"><math> <mi>β</mi> </math></EquationSource> </InlineEquation>-Ga<InlineEquation ID="IEq12"> <EquationSource Format="TEX">\(_2\)</EquationSource> <EquationSource Format="MATHML"><math> <mmultiscripts> <mrow /> <mn>2</mn> <mrow /> </mmultiscripts> </math></EquationSource> </InlineEquation>O<InlineEquation ID="IEq13"> <EquationSource Format="TEX">\(_3\)</EquationSource> <EquationSource Format="MATHML"><math> <mmultiscripts> <mrow /> <mn>3</mn> <mrow /> </mmultiscripts> </math></EquationSource> </InlineEquation>)-based dual-layer channel lateral junctionless field-effect transistors (DLCLJLFETs). This design strategy is intended to optimize the electric field distribution, enhance carrier confinement, and improve breakdown voltage, thereby advancing device performance for high-power and radio-frequency (RF) applications. The influence of device doping on various performance parameters of a field-effect transistor (FET), including breakdown voltage, peak electric field (<InlineEquation ID="IEq14"> <EquationSource Format="TEX">\({E}_{\text {c}}\)</EquationSource> <EquationSource Format="MATHML"><math> <msub> <mi>E</mi> <mtext>c</mtext> </msub> </math></EquationSource> </InlineEquation>), and impact ionization rate, has been investigated using technology computer-aided design (TCAD) simulation. Simulations are performed for devices having two layers with different doping concentrations. Simulated devices include progressive (the upper layer has a higher doping concentration than the lower layer) and retrograde (the upper layer has a lower doping concentration than the lower layer) doping profiles and also with different layer thicknesses. It is observed that a device with a heavily doped upper layer exhibits a retrograde trend in breakdown voltage, whereas a device with a lightly doped upper layer shows the opposite trend as the upper layer thickness increases and the lower layer decreases. A SPICE (Simulation Program with Integrated Circuit Emphasis) model is developed considering the impact of NN+ layers by introducing two parallel current sources. The implemented model is validated using the data obtained from TCAD simulations.</p>

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Analysis and Modeling of the Drain Current of β-Ga2O3 Dual-Layer Channel JLFETs Considering the Impact of Doping Concentration and Thickness of NN+ Layers

  • V. R. Manukrishna,
  • K. S. Nikhil

摘要

In this work, a synergistic engineering approach involving both progressive and retrograde doping profiles, combined with controlled modulation of the drift layer thickness, is implemented in \(\beta \) β -gallium oxide ( \(\beta \) β -Ga \(_2\) 2 O \(_3\) 3 )-based dual-layer channel lateral junctionless field-effect transistors (DLCLJLFETs). This design strategy is intended to optimize the electric field distribution, enhance carrier confinement, and improve breakdown voltage, thereby advancing device performance for high-power and radio-frequency (RF) applications. The influence of device doping on various performance parameters of a field-effect transistor (FET), including breakdown voltage, peak electric field ( \({E}_{\text {c}}\) E c ), and impact ionization rate, has been investigated using technology computer-aided design (TCAD) simulation. Simulations are performed for devices having two layers with different doping concentrations. Simulated devices include progressive (the upper layer has a higher doping concentration than the lower layer) and retrograde (the upper layer has a lower doping concentration than the lower layer) doping profiles and also with different layer thicknesses. It is observed that a device with a heavily doped upper layer exhibits a retrograde trend in breakdown voltage, whereas a device with a lightly doped upper layer shows the opposite trend as the upper layer thickness increases and the lower layer decreases. A SPICE (Simulation Program with Integrated Circuit Emphasis) model is developed considering the impact of NN+ layers by introducing two parallel current sources. The implemented model is validated using the data obtained from TCAD simulations.