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<p>In this paper, a new double trench silicon carbide MOSFET (MGDT-MOS) with a multifunctional gates is introduced, which can significantly improve the performance. An auxiliary gate (AG) and a low-concentration P-type channel (P-ch) are introduced at the source trench, and the auxiliary gate is connected to the gate. A Schottky diode is integrated on the right side of the device and a split gate is introduced to form an accumulating Schottky diode to increase the reverse current and provide a lower conduction voltage compared to the P-I-N body diode. During forward conduction, the auxiliary gate and N-CSL region completely depletes the P-ch to disconnect P-well from P+ source, thereby floating the otherwise grounded P-well (i.e. P-well is not connected to any electrode and the potential increases) and reducing the JFET effect (grounded P-well will deplete the N-CSL and increase the on-resistance). Compared to the specific on-resistance (<i>R</i><sub>on,sp</sub>) of a conventional dual-channel SiC MOSFET (DT-MOS), the device remains similar with one fewer electronic channel. During reverse conduction, the Schottky diode inhibits the conduction of the body diode, suppresses bipolar degradation effects, and reduces reverse recovery losses. Simulation results show that the proposed MGDT-MOS can reduce the <i>V</i><sub>cut-in</sub> voltage of the body diode from 2.8 V to 1.4 V at 100 A.The improved performances suggest that MGDT-MOS is a competitive option in power electronic systems. In addition, the coupling area between gate and drain is reduced due to the introduction of split gate, which reduces the gate-drain charge (<i>Q</i><sub>GD</sub>) and switching loss. Switching losses are reduced by 27.7% compared to DT-MOS.</p>

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A New Double Trench SiC MOSFET Integrated Multifunctional Gates for Improved Reverse Conduction Performance

  • 期刊论文

  • 发表日期：

    2025年7月2日

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  • Weizhong Chen,
  • Yufan Xiao,
  • Yangqi Zhou,
  • Zhengsheng Han,
  • Haishi Wang

摘要

In this paper, a new double trench silicon carbide MOSFET (MGDT-MOS) with a multifunctional gates is introduced, which can significantly improve the performance. An auxiliary gate (AG) and a low-concentration P-type channel (P-ch) are introduced at the source trench, and the auxiliary gate is connected to the gate. A Schottky diode is integrated on the right side of the device and a split gate is introduced to form an accumulating Schottky diode to increase the reverse current and provide a lower conduction voltage compared to the P-I-N body diode. During forward conduction, the auxiliary gate and N-CSL region completely depletes the P-ch to disconnect P-well from P+ source, thereby floating the otherwise grounded P-well (i.e. P-well is not connected to any electrode and the potential increases) and reducing the JFET effect (grounded P-well will deplete the N-CSL and increase the on-resistance). Compared to the specific on-resistance (Ron,sp) of a conventional dual-channel SiC MOSFET (DT-MOS), the device remains similar with one fewer electronic channel. During reverse conduction, the Schottky diode inhibits the conduction of the body diode, suppresses bipolar degradation effects, and reduces reverse recovery losses. Simulation results show that the proposed MGDT-MOS can reduce the Vcut-in voltage of the body diode from 2.8 V to 1.4 V at 100 A.The improved performances suggest that MGDT-MOS is a competitive option in power electronic systems. In addition, the coupling area between gate and drain is reduced due to the introduction of split gate, which reduces the gate-drain charge (QGD) and switching loss. Switching losses are reduced by 27.7% compared to DT-MOS.