<p>This paper explores the impact of spacer materials on the performance of a dual-material (DM) junctionless (JL) Tree-FET device, analyzing its direct current (DC) and analog/radio frequency (RF) characteristics. Single-κ (S-κ) spacers, including air, SiO<sub>2</sub>, Si<sub>3</sub>N<sub>4</sub>, HfO<sub>2</sub>, and TiO<sub>2</sub>, as well as dual-κ (D-κ) combinations of air + HfO<sub>2</sub>, SiO<sub>2</sub> + HfO<sub>2</sub>, air + TiO<sub>2</sub>, and SiO<sub>2</sub> + TiO<sub>2</sub> are evaluated herein. The study reveals significant improvements in DC performance with the TiO<sub>2</sub> spacer in the S-κ configuration, including an <i>I</i><sub>ON</sub>/<i>I</i><sub>OFF</sub> ratio, subthreshold slope (SS), and drain-induced barrier lowering (DIBL) of ~10<sup>10</sup>, 62.51&#xa0;mV/dec and 15.26&#xa0;mV/V, respectively. Analog/RF parameters such as transconductance (<i>g</i><sub>m</sub>), gain (A<sub>v</sub>), transconductance generation factor (TGF), and gain–frequency product (GFP) also improve with TiO<sub>2</sub>. The D-κ (air + TiO<sub>2</sub>) spacer further enhances DC and analog/RF performance, while the D-κ (air + HfO<sub>2</sub>) spacer excels in linearity due to reduced harmonic distortion. Additionally, a common-source amplifier using the D-κ (SiO<sub>2</sub> + TiO<sub>2</sub>) spacer achieves a 67.24% higher gain compared to the S-κ (TiO<sub>2</sub>) spacer. This research demonstrates the potential for optimized spacer materials in advancing the efficiency and performance of DM JL Tree-FET devices in modern semiconductor applications.</p>

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Enhancing DM Junctionless Tree-FET Performance Through Spacer Optimization: A Comprehensive DC and RF Analysis

  • Divya Beebireddy,
  • Kaleem Fatima,
  • L. Nirmala Devi

摘要

This paper explores the impact of spacer materials on the performance of a dual-material (DM) junctionless (JL) Tree-FET device, analyzing its direct current (DC) and analog/radio frequency (RF) characteristics. Single-κ (S-κ) spacers, including air, SiO2, Si3N4, HfO2, and TiO2, as well as dual-κ (D-κ) combinations of air + HfO2, SiO2 + HfO2, air + TiO2, and SiO2 + TiO2 are evaluated herein. The study reveals significant improvements in DC performance with the TiO2 spacer in the S-κ configuration, including an ION/IOFF ratio, subthreshold slope (SS), and drain-induced barrier lowering (DIBL) of ~1010, 62.51 mV/dec and 15.26 mV/V, respectively. Analog/RF parameters such as transconductance (gm), gain (Av), transconductance generation factor (TGF), and gain–frequency product (GFP) also improve with TiO2. The D-κ (air + TiO2) spacer further enhances DC and analog/RF performance, while the D-κ (air + HfO2) spacer excels in linearity due to reduced harmonic distortion. Additionally, a common-source amplifier using the D-κ (SiO2 + TiO2) spacer achieves a 67.24% higher gain compared to the S-κ (TiO2) spacer. This research demonstrates the potential for optimized spacer materials in advancing the efficiency and performance of DM JL Tree-FET devices in modern semiconductor applications.