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<p>Two-dimensional (2D) p-type semiconductors are essential for realizing complementary logic and energy-efficient electronics beyond silicon technology. Among them, tungsten diselenide (WSe<sub>2</sub>) has emerged as one of the most promising p-type metal-oxide-semiconductor (pMOS) channel materials due to its intrinsic p-type behavior, high carrier mobility, excellent electrostatic control, and compatibility with low-temperature processing. In recent years, significant progress has been made in the wafer-scale growth of high-quality 2D WSe<sub>2</sub>, enabling systematic investigations of its electrical properties and large-area device integration. This review provides a comprehensive overview of the state-of-the-art advances in wafer-scale growth strategies of 2D WSe<sub>2</sub> pMOS, including chemical vapor deposition (CVD), van der Waals (vdW) epitaxy, and interface-engineered growth approaches. We further summarize key developments in contact engineering, band structure modulation, and transport optimization that underpin high-performance pMOS devices. Building on these foundations, recent efforts toward three-dimensional (3D) integration of WSe<sub>2</sub>-based electronics are discussed, highlighting heterogeneous stacking, monolithic integration, and transfer-free integration schemes. Finally, we analyze the remaining challenges and outline future opportunities for integrating 2D WSe<sub>2</sub> pMOS into next-generation 3D integrated electronic systems.</p>

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From wafer-scale growth to 3D integration: 2D WSe2 pMOS for next-generation

  • 期刊论文

  • 发表日期：

    2026年6月22日

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  • Yi Jiang,
  • Guiming He,
  • Bei Zhao

摘要

Two-dimensional (2D) p-type semiconductors are essential for realizing complementary logic and energy-efficient electronics beyond silicon technology. Among them, tungsten diselenide (WSe2) has emerged as one of the most promising p-type metal-oxide-semiconductor (pMOS) channel materials due to its intrinsic p-type behavior, high carrier mobility, excellent electrostatic control, and compatibility with low-temperature processing. In recent years, significant progress has been made in the wafer-scale growth of high-quality 2D WSe2, enabling systematic investigations of its electrical properties and large-area device integration. This review provides a comprehensive overview of the state-of-the-art advances in wafer-scale growth strategies of 2D WSe2 pMOS, including chemical vapor deposition (CVD), van der Waals (vdW) epitaxy, and interface-engineered growth approaches. We further summarize key developments in contact engineering, band structure modulation, and transport optimization that underpin high-performance pMOS devices. Building on these foundations, recent efforts toward three-dimensional (3D) integration of WSe2-based electronics are discussed, highlighting heterogeneous stacking, monolithic integration, and transfer-free integration schemes. Finally, we analyze the remaining challenges and outline future opportunities for integrating 2D WSe2 pMOS into next-generation 3D integrated electronic systems.