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<p>In recent years, artificial intelligence (AI) has experienced rapid development, and high performance computing (HPC) has raised increasingly higher demands for hardware computational capacity. Resistive random-access memory (RRAM)-based computing-in-memory (CIM) technology is expected to overcome the bottleneck of memory wall and provide HPC solutions. However, CIM chips face critical thermal challenges, including severe hotspot formation and thermally induced performance degradation, due to increasing power density and strong data-space coupling effects. Existing thermal management solutions designed for conventional digital chips are not directly applicable to CIM architectures. In this work, we propose a comprehensive framework for thermal analysis and management tailored to CIM chips. Targeted strategies are developed across the design, pre-operation, and operation stages. During the design stage, it is essential to mitigate thermal-induced accuracy degradation by adopting optimized design strategies. During the pre-operation stage, we propose a latency-thermal co-optimization (LTCO) strategy for static thermal management. By combining LTCO with a genetic algorithm to optimize the neural network mapping scheme, we reduce the hotspot temperature by 6.5°C and the temperature standard deviation by 5.3°C, without increasing the latency. During the operation stage, we develop a dynamic thermal management (DTM) strategy tailored for RRAM-based CIM chips, considering their unique architecture and the coupling between data and space. The evaluation results show that when thermal management is triggered, the combination of LTCO and DTM achieves more than a 10% performance improvement over DTM alone.</p>

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Thermal analysis and management for RRAM-based computing-in-memory chips

  • 期刊论文

  • 发表日期：

    2026年5月8日

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  • Awang Ma,
  • Bin Gao,
  • Ruihua Yu,
  • Qingtian Zhang,
  • Peng Yao,
  • Jianshi Tang,
  • He Qian,
  • Huaqiang Wu

摘要

In recent years, artificial intelligence (AI) has experienced rapid development, and high performance computing (HPC) has raised increasingly higher demands for hardware computational capacity. Resistive random-access memory (RRAM)-based computing-in-memory (CIM) technology is expected to overcome the bottleneck of memory wall and provide HPC solutions. However, CIM chips face critical thermal challenges, including severe hotspot formation and thermally induced performance degradation, due to increasing power density and strong data-space coupling effects. Existing thermal management solutions designed for conventional digital chips are not directly applicable to CIM architectures. In this work, we propose a comprehensive framework for thermal analysis and management tailored to CIM chips. Targeted strategies are developed across the design, pre-operation, and operation stages. During the design stage, it is essential to mitigate thermal-induced accuracy degradation by adopting optimized design strategies. During the pre-operation stage, we propose a latency-thermal co-optimization (LTCO) strategy for static thermal management. By combining LTCO with a genetic algorithm to optimize the neural network mapping scheme, we reduce the hotspot temperature by 6.5°C and the temperature standard deviation by 5.3°C, without increasing the latency. During the operation stage, we develop a dynamic thermal management (DTM) strategy tailored for RRAM-based CIM chips, considering their unique architecture and the coupling between data and space. The evaluation results show that when thermal management is triggered, the combination of LTCO and DTM achieves more than a 10% performance improvement over DTM alone.