The emergence of noisy intermediate-scale quantum processors marked a pivotal stage in quantum computing, enabling the first demonstrations of quantum computational advantage despite limitations in qubit count, connectivity, and gate fidelity. Among the earliest and most accessible NISQ platforms were the IBM Quantum \(^\texttt {TM}\) computers, which provided an open testbed for algorithm development, benchmarking, and error mitigation. Crucially, many of these pioneering quantum computers have since been retired, rendering their performance records fragmented and at risk of permanent loss. This work presents a comprehensive benchmarking study of these early IBM quantum computers, documenting their architectural layouts, qubit connectivity, native gate sets, coherence properties, effective Hamiltonians, control mechanisms, error rates, and operational performance. We reconstruct the operational profiles of these quantum computers and highlight the trends, trade-offs, and limitations that characterized superconducting quantum hardware in the NISQ era. This study establishes a historical baseline for assessing progress in quantum hardware development, offering essential guidance on error scaling, coherence limitations, and architectural trade-offs for designing next-generation quantum hardware. These insights directly inform superconducting quantum architecture design, compilation strategies, and error-resilient algorithms on the path toward fault-tolerant quantum computation.
