<p>Stochastic computing (SC) provides a low-complexity and fault-tolerant approach for applications such as real-time convolutional neural networks (CNNs) and image processing. However, conventional SC architectures often suffer from high latency due to sequential computation and delays in random number generators (RNGs). This paper presents a novel RNG architecture that combines a lightweight LFSR-based generator with operand segmentation to accelerate bitstream generation while minimizing hardware overhead. Unlike existing RNGs, which either offer high accuracy at significant hardware cost (e.g., low-discrepancy sequences) or low cost with reduced precision (e.g., LFSRs), the proposed approach balances this trade-off, achieving both accuracy and efficiency. By dividing input operands into smaller segments, the method shortens critical paths, improves the uniformity of generated bitstreams, and reduces overall computational delay. Simulation results confirm that the architecture significantly lowers both hardware overhead and latency, making it highly suitable for fast, low-complexity stochastic computing applications, particularly in real-time and resource-constrained environments.</p>