Scholarlink

<p>Most modern electronic technologies today are highly dependent on the evolution of multi-gate transistors. The reduction in size of these devices causes the appearance of parasitic effects called short channel effects SCE. Today, researchers are aiming to reduce these effects, improve performance, and control the electrostatic gate of these devices. One of the solutions to reduce the effects of SCE is the use of cylindrical gate-All-Arround transistor GAA-FET. This study aspires to provide in-depth insights into the capabilities and limitations of multi-gate nano-transistors while offering valuable recommendations for their design and optimization in the context of future nanoscale electronic technologies. For these reasons, we proposed two structures: 4H-SiC/3C-SiC-GAA-FET and 4H-SiC/3C-SiC/InN-GAA-FET through ATLAS-SILVACO tool to simulate certain parameters to determine how they affect the performance of these two structures. We studied the impact of the variation of some physical parameters such as temperature, the effect of the use of different channel materials, and the effect of the variation of some structural parameters as: gate length Lg, the angle a, the radius of the channel materials R, and the temperature T for the both proposed structures on the electrical characteristics of these devices: Threshold voltage Vth, transconductance gm, current Ion and Ioff and the ratio Ion/Ioff, better results of these parameters are obtained for both structures simulated in this work, Optimizing different parameters of these two devices delicate balance between performance, energy efficiency, and reliability.</p>

错误：搜索内容不能为空，请输入英文关键词
错误：关键词超出字数限制，请精简
高级检索

Numerical Optimisation and Performance Reliability Of a Novel Cylindrical Gate-All-Arround GAA-FET Nano-transistors with Dual-Channel 4H-SiC/3C-SiC and Triple-Channel 4H-SiC/3C-SiC/InN Materials for Low Power Applications

  • 期刊论文

  • 发表日期：

    2025年7月15日

查看全文
  • Bourahla Nassima,
  • Khedim Youcef

摘要

Most modern electronic technologies today are highly dependent on the evolution of multi-gate transistors. The reduction in size of these devices causes the appearance of parasitic effects called short channel effects SCE. Today, researchers are aiming to reduce these effects, improve performance, and control the electrostatic gate of these devices. One of the solutions to reduce the effects of SCE is the use of cylindrical gate-All-Arround transistor GAA-FET. This study aspires to provide in-depth insights into the capabilities and limitations of multi-gate nano-transistors while offering valuable recommendations for their design and optimization in the context of future nanoscale electronic technologies. For these reasons, we proposed two structures: 4H-SiC/3C-SiC-GAA-FET and 4H-SiC/3C-SiC/InN-GAA-FET through ATLAS-SILVACO tool to simulate certain parameters to determine how they affect the performance of these two structures. We studied the impact of the variation of some physical parameters such as temperature, the effect of the use of different channel materials, and the effect of the variation of some structural parameters as: gate length Lg, the angle a, the radius of the channel materials R, and the temperature T for the both proposed structures on the electrical characteristics of these devices: Threshold voltage Vth, transconductance gm, current Ion and Ioff and the ratio Ion/Ioff, better results of these parameters are obtained for both structures simulated in this work, Optimizing different parameters of these two devices delicate balance between performance, energy efficiency, and reliability.