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<p>Learning in neural dynamic models involves optimizing network parameters through iterative updates. Memristor crossbar arrays (MCAs) are regarded as a promising in-memory computing (IMC) module for accelerating vector-matrix multiplication (VMM) in nonlinear radial basis function neural networks (RBFNNs). However, existing memristor-based neural networks typically rely on software assistance to compute the pulse width or amplitude required for weight updates, and their treatment of device non-idealities in practice hardware remains incomplete. To overcome these limitations, a memristor-based RBFNN with a step-variable edge learning scheme is proposed, aiming to recover the recognition accuracy by compensating for device non-idealities. The overall circuit architecture is presented, comprising two operational stages: forward computation and weight update, followed by detailed schematics of multiple circuit sub-blocks. By employing the learning-update blocks with target-driven control, the proposed design adaptively matches the corresponding gradient steps of consequent weights, enabling continuous column-by-column updates within the MCA. Simulations validate the functionality of both the proposed blocks and the overall system. Specifically, conductance variations and stuck-at-faults (SAFs) are considered in the simulations, and the results indicate that the proposed scheme enhances the system reliability and tolerance to such device non-idealities. Comparative studies further highlight its advantages in enabling fully analog edge learning and providing a more realistic representation of hardware behavior.</p>

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Memristor-based nonlinear neural dynamics with a step-variable edge learning scheme for device non-idealities

  • 期刊论文

  • 发表日期：

    2026年1月9日

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  • Ningye Jiang,
  • Jupeng Xie,
  • Depeng Li,
  • Haoen Huang,
  • Zhigang Zeng

摘要

Learning in neural dynamic models involves optimizing network parameters through iterative updates. Memristor crossbar arrays (MCAs) are regarded as a promising in-memory computing (IMC) module for accelerating vector-matrix multiplication (VMM) in nonlinear radial basis function neural networks (RBFNNs). However, existing memristor-based neural networks typically rely on software assistance to compute the pulse width or amplitude required for weight updates, and their treatment of device non-idealities in practice hardware remains incomplete. To overcome these limitations, a memristor-based RBFNN with a step-variable edge learning scheme is proposed, aiming to recover the recognition accuracy by compensating for device non-idealities. The overall circuit architecture is presented, comprising two operational stages: forward computation and weight update, followed by detailed schematics of multiple circuit sub-blocks. By employing the learning-update blocks with target-driven control, the proposed design adaptively matches the corresponding gradient steps of consequent weights, enabling continuous column-by-column updates within the MCA. Simulations validate the functionality of both the proposed blocks and the overall system. Specifically, conductance variations and stuck-at-faults (SAFs) are considered in the simulations, and the results indicate that the proposed scheme enhances the system reliability and tolerance to such device non-idealities. Comparative studies further highlight its advantages in enabling fully analog edge learning and providing a more realistic representation of hardware behavior.