<p>Chaotic synchronization control is of great significance in complex system theory and engineering applications, but its core challenges lie in the strong nonlinear coupling of chaotic systems, sensitivity to initial conditions, and noise interference. Traditional control methods such as feedback control and sliding mode control suffer from design redundancy and insufficient flexibility, making it difficult to effectively address the challenges of complex dynamic systems. To overcome these limitations, this paper proposes a Bidirectional Time-Varying Memristor-driven Neural Network Controller (BTVMNC). The controller employs a collaborative architecture of multi-to-one RNN modules and bidirectional recurrent neural networks (BiRNN) to precisely capture the correlation between local temporal characteristics and global dynamics of chaotic systems. For the first time, a flux-controlled memristor is introduced into the activation function, leveraging its dynamic resistance adjustment based on historical inputs to establish a dual memory mechanism (explicit error and hidden states), significantly enhancing adaptability to chaotic mutations. Combined with the Particle Swarm Optimization (PSO) algorithm, a minimalist parameterized design (only 6 weights required for a 3-dimensional system) achieves exponential convergence of master-slave system errors. Furthermore, a synchronization signal generation method based on dynamic matrices is proposed, utilizing linear combinations of state variables and non-square coefficient matrices to improve communication security. Numerical experiments demonstrate that BTVMNC maintains stable synchronization under extreme scenarios with noise, modeling uncertainties, and a 1000-fold difference in initial values between master and slave systems. Long-term control requires no continuous weight optimization, validating its efficiency and robustness. This research provides an innovative solution for the engineering application of chaotic synchronization. Its feasibility is finally verified using a Field Programmable Gate Array (FPGA).</p>

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Memristor-driven bidirectional time-varying neural network controller and its application in chaotic synchronization

  • Guofeng Yu,
  • Chunlei Fan

摘要

Chaotic synchronization control is of great significance in complex system theory and engineering applications, but its core challenges lie in the strong nonlinear coupling of chaotic systems, sensitivity to initial conditions, and noise interference. Traditional control methods such as feedback control and sliding mode control suffer from design redundancy and insufficient flexibility, making it difficult to effectively address the challenges of complex dynamic systems. To overcome these limitations, this paper proposes a Bidirectional Time-Varying Memristor-driven Neural Network Controller (BTVMNC). The controller employs a collaborative architecture of multi-to-one RNN modules and bidirectional recurrent neural networks (BiRNN) to precisely capture the correlation between local temporal characteristics and global dynamics of chaotic systems. For the first time, a flux-controlled memristor is introduced into the activation function, leveraging its dynamic resistance adjustment based on historical inputs to establish a dual memory mechanism (explicit error and hidden states), significantly enhancing adaptability to chaotic mutations. Combined with the Particle Swarm Optimization (PSO) algorithm, a minimalist parameterized design (only 6 weights required for a 3-dimensional system) achieves exponential convergence of master-slave system errors. Furthermore, a synchronization signal generation method based on dynamic matrices is proposed, utilizing linear combinations of state variables and non-square coefficient matrices to improve communication security. Numerical experiments demonstrate that BTVMNC maintains stable synchronization under extreme scenarios with noise, modeling uncertainties, and a 1000-fold difference in initial values between master and slave systems. Long-term control requires no continuous weight optimization, validating its efficiency and robustness. This research provides an innovative solution for the engineering application of chaotic synchronization. Its feasibility is finally verified using a Field Programmable Gate Array (FPGA).