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<p>Interface defects at the semiconductor/dielectric interface and traps within the dielectric layer can increase leakage current and degrade device stability and reliability. Therefore, optimizing gate dielectric materials and annealing processes is essential for improving the electrical performance of metal–oxide–semiconductor (MOS) devices. This work systematically examines the impact of different annealing temperatures on the electrical characteristics of HfO<sub>2</sub>, Al<sub>2</sub>O<sub>3</sub>, and (Al<sub>2</sub>O<sub>3</sub>)<sub>0.5</sub>(HfO<sub>2</sub>)<sub>0.5</sub> dielectric film MOS capacitors. X-ray photoelectron spectroscopy (XPS) was used to investigate the composition and band structure of (Al<sub>2</sub>O<sub>3</sub>)<sub><i>x</i></sub>(HfO<sub>2</sub>)<sub>1−<i>x</i></sub> films. The effects of different material compositions on band alignment and dielectric constant were investigated. The results indicate that both the bandgap and dielectric constant of (Al<sub>2</sub>O<sub>3</sub>)<sub><i>x</i></sub>(HfO<sub>2</sub>)<sub>1−<i>x</i></sub> film linearly with composition. The electrical properties of the devices and the leakage current mechanism under high electric fields were examined through capacitance–voltage (<i>C–V</i>) and current–voltage (<i>I–V</i>) measurements. The interface quality was considerably enhanced and the leakage current was reduced by annealing at 500&#xa0;°C, as was discovered. In comparison to single-layer materials, the composite gate dielectric film (Al<sub>2</sub>O<sub>3</sub>)<sub>0.5</sub>(HfO<sub>2</sub>)<sub>0.5</sub> exhibited superior interface characteristics. Examination of leakage mechanisms indicates that unannealed and samples annealed at 300&#xa0;°C are mostly influenced by trap-assisted tunneling (TAT), whereas Fowler–Nordheim (F–N) tunneling prevails following 500&#xa0;°C annealing. At temperatures ranging from 700 to 1000&#xa0;°C, Frenkel–Poole (F–P) emission becomes the dominant mechanism. In addition, increasing Al content raises the critical electric field for leakage onset. This study provides theoretical insight and process guidance for optimizing thermal treatment of high-<i>k</i> gate dielectrics and improving device performance.</p>

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Influence of annealing temperature on the dielectric properties of (Al2O3)x(HfO2)(1−x)

  • 期刊论文

  • 发表日期：

    2026年5月29日

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  • Yifan Jia,
  • Tianjiao Xiao,
  • Zhan Wang,
  • Xiangtai Liu,
  • Haochen Wan,
  • Qin Lu,
  • Shaoqing Wang,
  • Haifeng Chen

摘要

Interface defects at the semiconductor/dielectric interface and traps within the dielectric layer can increase leakage current and degrade device stability and reliability. Therefore, optimizing gate dielectric materials and annealing processes is essential for improving the electrical performance of metal–oxide–semiconductor (MOS) devices. This work systematically examines the impact of different annealing temperatures on the electrical characteristics of HfO2, Al2O3, and (Al2O3)0.5(HfO2)0.5 dielectric film MOS capacitors. X-ray photoelectron spectroscopy (XPS) was used to investigate the composition and band structure of (Al2O3)x(HfO2)1−x films. The effects of different material compositions on band alignment and dielectric constant were investigated. The results indicate that both the bandgap and dielectric constant of (Al2O3)x(HfO2)1−x film linearly with composition. The electrical properties of the devices and the leakage current mechanism under high electric fields were examined through capacitance–voltage (C–V) and current–voltage (I–V) measurements. The interface quality was considerably enhanced and the leakage current was reduced by annealing at 500 °C, as was discovered. In comparison to single-layer materials, the composite gate dielectric film (Al2O3)0.5(HfO2)0.5 exhibited superior interface characteristics. Examination of leakage mechanisms indicates that unannealed and samples annealed at 300 °C are mostly influenced by trap-assisted tunneling (TAT), whereas Fowler–Nordheim (F–N) tunneling prevails following 500 °C annealing. At temperatures ranging from 700 to 1000 °C, Frenkel–Poole (F–P) emission becomes the dominant mechanism. In addition, increasing Al content raises the critical electric field for leakage onset. This study provides theoretical insight and process guidance for optimizing thermal treatment of high-k gate dielectrics and improving device performance.