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<p>It is significant for the radiation hardened techniques to measure the pulse width of single event transient (SET), which has become one of the most important reliability issues of integrated circuits (ICs). Based on Vernier Delay Line topology, an autonomous pulse width measurement system is designed. It is composed of delay propagation circuit, SET capture circuit and output register circuit. The accurate result of the SET width is achieved by the mean value of uniform distribution instead of the number of triggered stages. To validate and test the proposed design, the measurements of the pulse widths from different linear energy transfer (LET) heavy-ion exposures are performed. The results show that the proposed design can obtain the pulse width accurately and multiple transient can be also captured. Results from 1000 random cases show that by comparison with the previous test circuit, the proposed design has a significant improved accuracy with an average error of only 1.19%.</p>

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A Design for Single Event Transient Pulse Width Measurement in CMOS Technology

  • 期刊论文

  • 发表日期：

    2026年6月24日

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  • Baojun Liu,
  • Chuang Li

摘要

It is significant for the radiation hardened techniques to measure the pulse width of single event transient (SET), which has become one of the most important reliability issues of integrated circuits (ICs). Based on Vernier Delay Line topology, an autonomous pulse width measurement system is designed. It is composed of delay propagation circuit, SET capture circuit and output register circuit. The accurate result of the SET width is achieved by the mean value of uniform distribution instead of the number of triggered stages. To validate and test the proposed design, the measurements of the pulse widths from different linear energy transfer (LET) heavy-ion exposures are performed. The results show that the proposed design can obtain the pulse width accurately and multiple transient can be also captured. Results from 1000 random cases show that by comparison with the previous test circuit, the proposed design has a significant improved accuracy with an average error of only 1.19%.