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<p>This paper presents an ultra-broadband on-chip bias network for distributed amplifiers (DAs) in indium phosphide (InP) technology, eliminating conventional RF-choke constraints through a reconfigurable 2-port DC-feed block. Capitalizing on distributed amplification principles, the reverse-configured topology with strategic port inversion grounds RF pathways while integrating an R-C impedance network (50-<InlineEquation ID="IEq1"> <EquationSource Format="TEX">\(\Omega \)</EquationSource> </InlineEquation> resistor + 0.2-pF capacitor) to suppress power supply noise and enable native cascadability. Measured results demonstrate ultra-broadband operation with &gt;10 dB isolation from 20 to 170 GHz in a compact size of 0.015 mm<InlineEquation ID="IEq2"> <EquationSource Format="TEX">\(^2\)</EquationSource> </InlineEquation>. Crucially, the proposed architecture eliminates external bias-tee modules by providing on-demand reconfigurability, and the direct RF-port connection evolves the DC-feed into a fully operational 3-port bias-tee, unlocking monolithic integrated circuits (MMICs) and sub-terahertz (sub-THz) wireless applications. This architecture optimizes noise suppression, test complexity, and functional flexibility, establishing another topology for integrated bias networks.</p>

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An Ultra-Broadband On-Chip DC-Feed Block for Sub-THz Applications in InP Technology

  • 期刊论文

  • 发表日期：

    2026年5月21日

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  • Yao Li,
  • Yan Gao,
  • Liang Zhao,
  • Yan Sun,
  • Weihua Yu

摘要

This paper presents an ultra-broadband on-chip bias network for distributed amplifiers (DAs) in indium phosphide (InP) technology, eliminating conventional RF-choke constraints through a reconfigurable 2-port DC-feed block. Capitalizing on distributed amplification principles, the reverse-configured topology with strategic port inversion grounds RF pathways while integrating an R-C impedance network (50- \(\Omega \) resistor + 0.2-pF capacitor) to suppress power supply noise and enable native cascadability. Measured results demonstrate ultra-broadband operation with >10 dB isolation from 20 to 170 GHz in a compact size of 0.015 mm \(^2\) . Crucially, the proposed architecture eliminates external bias-tee modules by providing on-demand reconfigurability, and the direct RF-port connection evolves the DC-feed into a fully operational 3-port bias-tee, unlocking monolithic integrated circuits (MMICs) and sub-terahertz (sub-THz) wireless applications. This architecture optimizes noise suppression, test complexity, and functional flexibility, establishing another topology for integrated bias networks.