<p>Trimming circuits is a key approach for improving the yield of integrated chips in advanced manufacturing processes. As chip complexity increases, the number of trimming points also rises, often accompanied by parameter interdependence and interference that hinder trimming efficiency and consistency. This paper proposes a dynamic-centroid-guided method for efficient multi-parameter trimming of integrated chips. The method identifies parameter dependencies through correlation analysis, and fits a process deviation trend function based on historical data to dynamically compute an updated centroid. This centroid guides the optimization path, helping the search process escape local minima and accelerate convergence. Experimental results demonstrate that the proposed method achieves an average of 6.37 iterations and 0.0130 seconds of runtime, reducing these metrics by approximately 50% and 29% compared to a reference algorithm. The proposed technique exhibits superior optimization efficiency and stability, and provides a robust, scalable solution for large-scale multi-parameter trimming in integrated chips.</p>