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<p>High-precision analog-to-digital converters (ADCs) are critical components in data acquisition systems, where the accuracy and cost-effectiveness of performance evaluations are increasingly prioritized in the industry. This paper introduces a novel algorithm designed for the rapid and accurate assessment of ADC static parameters. Our approach facilitates testing within an 8000-point sampling framework, significantly reducing both the time required for testing and the purity demands on the signal source, thereby decreasing overall testing costs. The methodology involves spectral interpolation of the input signal frequency coupled with adjustments to the sequence length to mitigate the effects of incoherent sampling on the Fourier transform spectral distribution. Additionally, the ADC’s actual transmission curve is modeled using Chebyshev polynomials, decreasing the number of samples needed to compute Integral Non-Linearity (INL) and Differential Non-Linearity (DNL). Crucially, the algorithm allows for the testing of high-precision ADC parameters using a low-precision signal source by effectively eliminating signal source noise. The efficacy of the proposed algorithm is demonstrated through tests conducted on the 16-bit AD7606 with an input signal resolution of 14 bits and a sampling count of 8000. The resulting measured DNL and INL values, 0.4296 LSB and 1.1623 LSB respectively, fall within the specifications provided in the chip manual, thereby validating the effectiveness of the proposed approach.</p>

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Chebyshev-based Algorithm: Achieving Fast ADC Static Parameter Testing Using a Low-precision Signal Source

  • 期刊论文

  • 发表日期：

    2025年10月6日

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  • Jun Yuan,
  • Liangrui Zhang,
  • Yuyang Zhang

摘要

High-precision analog-to-digital converters (ADCs) are critical components in data acquisition systems, where the accuracy and cost-effectiveness of performance evaluations are increasingly prioritized in the industry. This paper introduces a novel algorithm designed for the rapid and accurate assessment of ADC static parameters. Our approach facilitates testing within an 8000-point sampling framework, significantly reducing both the time required for testing and the purity demands on the signal source, thereby decreasing overall testing costs. The methodology involves spectral interpolation of the input signal frequency coupled with adjustments to the sequence length to mitigate the effects of incoherent sampling on the Fourier transform spectral distribution. Additionally, the ADC’s actual transmission curve is modeled using Chebyshev polynomials, decreasing the number of samples needed to compute Integral Non-Linearity (INL) and Differential Non-Linearity (DNL). Crucially, the algorithm allows for the testing of high-precision ADC parameters using a low-precision signal source by effectively eliminating signal source noise. The efficacy of the proposed algorithm is demonstrated through tests conducted on the 16-bit AD7606 with an input signal resolution of 14 bits and a sampling count of 8000. The resulting measured DNL and INL values, 0.4296 LSB and 1.1623 LSB respectively, fall within the specifications provided in the chip manual, thereby validating the effectiveness of the proposed approach.